IEEE Transactions on Circuits and Systems I: Regular Papers

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Publication Year: 2008, Page(s):C1 - C4
Cited by:  Papers (1)
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• IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

Publication Year: 2008, Page(s): C2
| |PDF (40 KB)
• Cochlea-Based RF Channelizing Filters

Publication Year: 2008, Page(s):969 - 979
Cited by:  Papers (16)
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A new type of contiguous-channel RF multiplexing filter has been developed. The filter topology is derived from an electrical-mechanical analogy of the mammalian cochlea, and this channelizer retains the desirable features of the cochlea including multiple-octave frequency coverage, a large number of output channels, and an enhanced high-order upper stop-band response. Results of two 20-channel, 2... View full abstract»

• A Capacitive-Based Accelerometer IC Using Injection-Nulling Switch Technique

Publication Year: 2008, Page(s):980 - 989
Cited by:  Papers (14)
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This paper presents a new fully integrated sensing interface and signal-conditioning application-specific integrated circuit (ASIC) for automotive accelerometers based on an ldquoinjection-nulling switchrdquo (INS) technique. The INS technique simplifies the design of both the switched-capacitor (SC) sensing amplifier and its supporting building blocks without jeopardizing its performance. This is... View full abstract»

• Binary-Weighted Digital-to-Analog Converter Design Using Floating-Gate Voltage References

Publication Year: 2008, Page(s):990 - 998
Cited by:  Papers (8)
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An implementation of a compact and programmable 10-bits floating-gate digital-to-analog converter (FGDAC) is described. In this implementation, nonvolatile floating-gate voltage references (epots) are employed together with unity-size capacitors to obtain the binary-weighted scale factors. The FGDAC, fabricated in a 0.5- mum CMOS process, occupies 0.208 mm2 of die area. The stored epot ... View full abstract»

• Tunable Highly Linear Floating-Gate CMOS Resistor Using Common-Mode Linearization Technique

Publication Year: 2008, Page(s):999 - 1010
Cited by:  Papers (10)  |  Patents (1)
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In this paper, an implementation of a tunable highly linear floating resistor that can be fully integrated in CMOS technology is presented. The second-order effects of a single MOS transistor operating in the triode operation regime are described, and a common-mode linearization technique is applied to suppress these nonlinearities. This technique is implemented by utilizing a low-power circuit de... View full abstract»

• Reducing the Number of Comparators in Multibt $Delta Sigma$ Modulators

Publication Year: 2008, Page(s):1011 - 1022
Cited by:  Papers (8)
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Multibit feedback, being one way of lowering DeltaSigma modulators power consumption, has a major obstacle: the number of components in the internal analog-to-digital converter (ADC) and digital-to-analog converter (DAC). Nevertheless, the number of comparators in the ADC can be significantly reduced depending on the order of noise-shaping and the oversampling ratio. In this paper, we propose an a... View full abstract»

• Optimal Voltage Scaling, Repeater Insertion, and Wire Sizing for Wave-Pipelined Global Interconnects

Publication Year: 2008, Page(s):1023 - 1030
Cited by:  Papers (10)
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The simultaneous application of voltage scaling, repeater insertion, and wire sizing is proposed in this paper to achieve high performance, low power, and low area on wave-pipelined interconnect circuits. Based on this methodology, design optimizations for three different types of applications are performed and different design metrics are used to obtain the optimal values of supply voltage, numbe... View full abstract»

• Systolic and Super-Systolic Multipliers for Finite Field $GF(2^{m})$ Based on Irreducible Trinomials

Publication Year: 2008, Page(s):1031 - 1040
Cited by:  Papers (34)
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Novel systolic and super-systolic architectures are presented for polynomial basis multiplication over GF(2m) based on irreducible trinomials. By suitable cut-set retiming, we have derived here an efficient bit-level-pipelined bit-parallel systolic design for binary field multiplication which requires fewer gates and registers and involves nearly half the time-complexity of the correspo... View full abstract»

• Power-Supply and Substrate-Noise-Induced Timing Jitter in Nonoverlapping Clock Generation Circuits

Publication Year: 2008, Page(s):1041 - 1054
Cited by:  Papers (5)
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This paper describes a study of power-supply noise and substrate noise impact on the timing properties of two nonoverlapping clock generation circuits that are typically used in sigma-delta modulators. The constituent logic blocks of the clock generation circuits are also individually characterized where special attention has been put on the inverter whose behavior is fully described in mathematic... View full abstract»

• Cryptanalyzing an Encryption Scheme Based on Blind Source Separation

Publication Year: 2008, Page(s):1055 - 1063
Cited by:  Papers (19)
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Recently, there was a proposal of using the underdetermined blind source separation (BSS) principle to design image and speech encryption. In this paper, we report a cryptanalysis of this BSS-based encryption scheme and point out that it is not secure against known-/chosen-plaintext attack and chosen-ciphertext attack. In addition, we discuss some other security defects of the schemes: (1) it has ... View full abstract»

• Synchronization and Small-Signal Analysis of Nonlinear Periodic Circuits

Publication Year: 2008, Page(s):1064 - 1073
Cited by:  Papers (6)
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Common approaches to simulate the steady-state behavior of nonlinear periodic circuits forced by a periodic signal of small amplitude assume that the forcing signal effects are additive to the steady-state solution of the unperturbed circuit. This assumption leads to the adoption of the variational model of the nonlinear unperturbed circuit. The variational model does not pose any particular probl... View full abstract»

• Numerical Determination of Possible Multiple DC Solutions of Nonlinear Circuits

Publication Year: 2008, Page(s):1074 - 1083
Cited by:  Papers (15)
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This paper proposes an approach to find possible multiple solutions of nonlinear resistive circuits. The approach does not guarantee to find all the solutions; its main features are efficiency, the ability to deal with circuits composed of elements described by the most common models employed in microelectronics, such as DIODEs, bipolar junction transistors, MOSFETs and the capability to simulate ... View full abstract»

• Stability Analysis of the Continuous-Conduction-Mode Buck Converter Via Filippov's Method

Publication Year: 2008, Page(s):1084 - 1096
Cited by:  Papers (112)
| |PDF (721 KB) | HTML

To study the stability of a nominal cyclic steady state in power electronic converters, it is necessary to obtain a linearization around the periodic orbit. In many past studies, this was achieved by explicitly deriving the Poincare map that describes the evolution of the state from one clock instant to the next and then locally linearizing the map at the fixed point. However, in many converters, ... View full abstract»

• Gain Scheduling Synchronization Method for Quadratic Chaotic Systems

Publication Year: 2008, Page(s):1097 - 1107
Cited by:  Papers (6)
| |PDF (546 KB) | HTML

A global gain scheduling synchronization method is developed in this paper for the identical synchronization of quadratic chaotic systems. The quadratic chaotic system contains nonlinearity of quadratic terms of system's states. With chaotic states being bounded in certain regions, the quadratic chaotic system can be rewritten into the linear parameter varying (LPV) form through algebraic transfor... View full abstract»

• Chaotic Communication Based on the Particle-in-a-Box Electronic Circuit

Publication Year: 2008, Page(s):1108 - 1115
Cited by:  Papers (9)
| |PDF (771 KB) | HTML

A secure communication system based on the error-feedback synchronization of the electronic model of the particle-in-a-box system is proposed. This circuit allows a robust and simple electronic emulation of the mechanical behavior of the collisions of a particle inside a box, exhibiting rich chaotic behavior. The required nonlinearity to emulate the box walls is implemented in a simple way when co... View full abstract»

• Symbolic Vector Dynamics Approach to Initial Condition and Control Parameters Estimation of Coupled Map Lattices

Publication Year: 2008, Page(s):1116 - 1124
Cited by:  Papers (16)
| |PDF (1513 KB) | HTML

In this paper, we extend symbolic dynamics, a standard analytical method for 1-D chaotic map, and initiate a solution to the problem of estimation in coupled map lattices (CMLs) by introducing the symbolic vector dynamics. We develop a novel technique for estimating initial conditions. We also expand the applicable scope of a word-lifting technique for parameter estimation from a 1-D chaotic map t... View full abstract»

• Analysis of Spatiotemporal Patterns in an Infinite-Dimensional Electromagnetic System

Publication Year: 2008, Page(s):1125 - 1132
Cited by:  Papers (2)
| |PDF (1362 KB) | HTML

An infinite-dimensional electromagnetic system is proposed as a practical model for analyzing the spatiotemporal chaos. The system consists of a linear lossless transmission line connected to a p-n-junction diode in series with a DC bias voltage source at one end and to an active linear resistor at the other end. The temporal dynamics of the backward-traveling voltage wave is investigated by using... View full abstract»

• A Differential Architecture for an Online Analog Viterbi Decoder

Publication Year: 2008, Page(s):1133 - 1140
Cited by:  Papers (2)  |  Patents (2)
| |PDF (496 KB) | HTML

A differential architecture of an analog Viterbi decoder is presented. Analog processing enables the analog-digital converter to be excluded from the decoder realization. Moreover, high-speed operation can be achieved via differential processing. We describe the differential operation, together with the resulting decoder structure. The differential architecture enables the trace-back memory to be ... View full abstract»

• An Adaptive Filtering Algorithm for Direct-Conversion Receivers: Architecture and Performance Analysis

Publication Year: 2008, Page(s):1141 - 1148
Cited by:  Papers (2)
| |PDF (653 KB) | HTML

An adaptive filtering algorithm is proposed in this paper to remove mismatch, dc offsets, flicker noise, and intersymbol interference (ISI) simultaneously in a direct-conversion receiver. mismatch is cancelled by a real valued adaptive mismatch canceller, and dc offsets are removed with one complex tap. In addition, flicker noise is modeled as a complex autoregressive (AR) random process so the sy... View full abstract»

• Identification of the Radial Configurations Extracted From the Weakly Meshed Structures of Electrical Distribution Systems

Publication Year: 2008, Page(s):1149 - 1158
Cited by:  Papers (16)
| |PDF (694 KB) | HTML

The electrical distribution systems are typically structured as weakly meshed networks with multiple supply points, but they are operated with radial configurations by opening the redundant branches. The nonregular composition of the meshed structure and the constraints imposed by the number and location of the supply points complicate the problem of determining all of the possible radial configur... View full abstract»

• A Family of Single-Switch PWM Converters With High Step-Up Conversion Ratio

Publication Year: 2008, Page(s):1159 - 1171
Cited by:  Papers (131)
| |PDF (790 KB) | HTML

A new family of a single-switch three-diode dc-dc pulsewidth-modulated (PWM) converters operating at constant frequency and constant duty cycle is presented in this paper. The proposed converters are different from the conventional dc-dc step-up converters, and they posses higher voltage gain with small output voltage ripples. Other advantages of the proposed converters include lower voltage stres... View full abstract»

• Comments on "Bandpass Sigma-Delta Modulator Employing SAW Resonator as Loop Filter

Publication Year: 2008, Page(s):1172 - 1175
Cited by:  Papers (1)
| |PDF (223 KB) | HTML

Some corrections needed in the theoretical analysis of the surface acoustic wave resonator loop filter for a bandpass sigma-delta modulator, as presented by Yu and Xu, are pointed out. A simple idea is also proposed for perfect cancellation of anti-resonance without substantially affecting the resonance frequency, but with the added benefits of an enhanced factor and insertion gain, rather than in... View full abstract»

• IEEE Transactions on Circuits and Systems—I: Regular Papers Information for authors

Publication Year: 2008, Page(s): 1176
| |PDF (41 KB)
• IEEE Circuits and Systems Society Information

Publication Year: 2008, Page(s): C3
| |PDF (33 KB)

Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK