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Components, Hybrids, and Manufacturing Technology, IEEE Transactions on

Issue 5 • Date Oct 1992

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Displaying Results 1 - 25 of 36
  • Thermal interaction of semiconductor devices on copper clad ceramic substrates

    Publication Year: 1992 , Page(s): 651 - 657
    Cited by:  Papers (4)
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    The temperature rise due to the spacing between two heat dissipating devices mounted on metallized or copper-clad ceramic substrates is presented. The thickness of the copper layer, the thermal conductivity of the substrate material, and the thermal resistance of the heat sink system are considered. Results for parameters typically found in power hybrid applications are presented in nondimensional form. The results indicate that increasing the thickness of the copper metallization requires that the devices be placed farther apart to prevent thermal interaction. An increase in the copper layer thickness can significantly decrease the device temperatures on alumina, but may increase temperatures on high thermal conductivity ceramic substrates such as beryllia (BeO). The results also demonstrate that the external heat sink thermal resistance can cause significant heat flow spreading and increased temperatures in the substrate. As the external resistance increases, the spacing required to prevent thermal interaction also increases View full abstract»

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  • Thermal enhancements for a thin film chip carrier

    Publication Year: 1992 , Page(s): 699 - 706
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    The development of a thermal enhancement technique targeted for single-chip, thin-film carriers is described. The test package consisted of a 7.5-mm by 7.5-mm chip bonded to a high lead count organic tape substrate using tape automated bonding (TAB). Because of high chip power requirements, a thermal enhancement consisting of a heat sink bonded to the chip with a thermally conductive epoxy was developed. The objectives were to develop the appropriate heat sink, thermal adhesive, and assembly process for the heat management system. The thermal performance of the package was evaluated in both natural and forced convection environments. Reliability measurements were taken to ensure the chip to heat sink interface and the overall package withstood the required stresses without significant performance deterioration. These stresses included standard accelerated thermal cycling (ATC), ship shock, mechanical torque and vibration, and chemical exposure View full abstract»

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  • A technique for enhancing boiling heat transfer with application to cooling of electronic equipment

    Publication Year: 1992 , Page(s): 823 - 831
    Cited by:  Papers (3)  |  Patents (1)
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    Particle layering is introduced as an effective and convenient technique for enhancing boiling nucleation on a surface. Because it can be applied without stress or damage to a surface, it may be implemented in immersion cooling, with boiling, of electronic equipment components. Such an enhanced surface, which has an increased number of nucleation sites, shows a decreased level of wall superheat under boiling and an increased critical heat flux (CHF) relative to superheat and CHF values for an untreated surface. Application of this technique results in a decrease of heated surface temperature and a more uniform temperature of the heated surface; both effects are important in immersion cooling of electronic equipment View full abstract»

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  • The effect of thermal capacitance and phase change on outside plant electronic enclosures

    Publication Year: 1992 , Page(s): 843 - 849
    Cited by:  Papers (5)
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    The effect of heat storage on temperatures inside telecommunications outside plant electronic enclosures is examined. A simple thermal analog model is developed to represent the heat flow in an enclosure that contains a thin envelope of phase change material (PCM). Two sets of equations are obtained for the internal and the PCM temperatures, one when the PCM is in a sensible heat storage mode and the one when it is in its latent heat storage mode. Exact solutions are obtained for both modes. For the sensible mode, the solution yields simple expressions for enclosure damping and delay factors. For the latent mode, the internal temperature is shown to be a simple exponential function of time, with maximum value determined by the phase change temperature and internal heat generation. The analytical results are compared with initial data from several small capacitive outside plant enclosures, indicating that the analytical expressions provide a good method for estimating temperatures in these enclosures View full abstract»

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  • Using a thermal simulation model to interpret test data

    Publication Year: 1992 , Page(s): 632 - 639
    Cited by:  Papers (1)
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    The concurrent utilization of testing and simulation models in electronic system thermal characterization is illustrated through three series of tests involving air cooling of circuit boards with regular and irregular component layouts. A simulation model based upon a combination of integral energy and momentum balances and local thermal networks is used in these exercises. Specific sensitivities tested include component powering, component height, and arrangement heterogeneity. The treatment of convective heat transfer and the estimation of coolant flow split among component flow channels were found to be the most important sensitivities in these tests. Special consideration is given to using simulation models to reduce uncertainties in estimating adiabatic heat transfer coefficients. The general process of data interpretation using a simulation model is outlined as a series of guidelines View full abstract»

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  • Transient thermal measurements using the index of refraction as a temperature sensitive parameter

    Publication Year: 1992 , Page(s): 625 - 631
    Cited by:  Papers (1)
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    Two techniques for transient thermal measurements are presented. One measurement technique employs the change of optical index of refraction with temperature, which is usually referred to as the thermooptic effect in optics. Even though this change is very small, in the range of 10-5/°C, its effect can be transformed into large variations in optical signals by proper design. The other method utilizes the thermoresistive effect of electrical resistance change with temperature. This change is in the range of 4×10-3/°C, which is adequate to provide a signal for measurement. The intrinsic response time of both techniques is a few nanoseconds, thus providing the means to study the rapid initial temperature rise caused by a step source power. The measured thermal responses are compared with the response calculated using a three-dimensional transient temperature solution derived previously. The measured responses agree well with the calculated one View full abstract»

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  • Optimization of the thermal design of a cryogenically cooled computer

    Publication Year: 1992 , Page(s): 794 - 805
    Cited by:  Papers (1)
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    In this paper, the performance and cost of three types of cryogenic cooling systems are analyzed; a `once through' system in which liquid nitrogen is allowed to boil on the CPU boards and is then vented to the surroundings; a saturated pool boiling refrigerated system in which gaseous nitrogen generated from boiling on the CPU boards is condensed in the vapor space above the liquid nitrogen pool; and a subcooled pool boiling refrigerated system in which the `condenser' is completely submerged in a subcooled liquid nitrogen pool surrounding the CPU boards. Thermal/fluid numerical models used in conjunction with an optimization code, GRG2, were used to predict the performance and cost of the cryogenic cooling systems. The uniform annual cost of the `once through' system was calculated to be $28.8K. This compares with $34.6K for the optimal subcooled pool boiling system. Due to the extremely high initial cost of the refrigerated systems, the `once-through' cryogenic cooling system is recommended if the local heat flux on the CPU board remains below 15 W/cm2 View full abstract»

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  • Thermal design space prediction in two-phase direct liquid cooling

    Publication Year: 1992 , Page(s): 778 - 785
    Cited by:  Papers (2)
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    Software for predicting the optimum operating conditions for a two-phase liquid cooling environment is presented. This software consists of a data bank which includes a variety of physical and thermodynamic properties of fluorocarbons. It also includes heat transfer correlations which cover the range from single-phase boiling incipience, to nucleate boiling, to critical heat flux. The heat flux of the integrated circuit is compared to the calculated boiling incipience heat flux and critical heat flux to determine if the operating conditions provide for nucleate boiling. The optimum operating conditions are determined for three cooling schemes: pool boiling, flow boiling, and jet impingement boiling. Application of the software indicated that the jet impingement boiling has better thermal performance than flow and pool boiling. The uncertainties involved in the software predictions are considered in terms of design rule development View full abstract»

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  • Transient thermal gradients across solder interconnections in electronic systems

    Publication Year: 1992 , Page(s): 685 - 690
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    A thermal analysis for a component mounted on a carrier via solder interconnections is provided, with emphasis on understanding how the thermal gradients across the solder interconnections develop during the power-on transient. A 1-D model is sought for its simplicity, while the important features of the problem are kept intact. Closed-form solutions are obtained when the thermal mass of the component is much less than the thermal mass of the carrier. The asymptotic solutions are compared with the numerical solutions of the same set of equations. Finite element solutions and experimental data are also obtained to assess the validity of the 1-D model as a predictor of the thermal gradients across the solder interconnections. Results of the analysis show that the thermal gradients across the solder interconnections reach a maximum at some early time before steady-state conditions are reached and that the thermally induced transient strains can be several times worse than the steady-state strains View full abstract»

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  • Temperature solution of five-layer structure with a circular embedded source and its applications

    Publication Year: 1992 , Page(s): 707 - 714
    Cited by:  Papers (6)
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    The temperature solution of a five-layer structure with a circular embedded source is reported. The solution is in the form of a single integration rather than the double integration of the solution for a structure with a rectangular source. An algorithm is developed for effective and accurate calculation of the integral solution. Based upon the solution and algorithm, a software program, PAMICE, has been written. Using the circular source solution, the CPU time for temperature calculation is reduced by a factor of 10 as compared to the rectangular source solution. An important application for the solution is the use of a circular source instead of square source as the unit source to produce the unit thermal profile for the real-time thermal design of integrated circuits. The solution is also valuable for the thermal study and analysis of devices having circular sources, such as power transistors, light emitting diodes, and laser diodes. Two application examples are presented View full abstract»

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  • Extensions of the closed form method for substrate thermal analyzers to include thermal resistances from source-to-substrate and source-to-ambient

    Publication Year: 1992 , Page(s): 658 - 666
    Cited by:  Papers (8)
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    The Fourier series/integral closed-form method for substrate thermal analyzers has been limited by the specification of heat sources on the substrate surface. A method of complementing the basic substrate boundary value problem with lumped thermal resistances is described. In this manner, the thermal interface resistance between a chip package and board, as well as between the same package and a local ambient can be accommodated. The technique consists of combining the methods of Fourier series solution and lumped parameter thermal resistances. The theory is verified by comparing results with both thermal network and finite element model calculations for a sample problem consisting of four active devices attached to a substrate. The ramifications of a uniform heat flux at the board surface are examined by evaluating an approximate representation of a surface mount chip package. Results are compared with experimental test data for a small printed circuit board with 56 dual in-line resistor packs View full abstract»

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  • High density pin board matrix switches for automated MDF systems

    Publication Year: 1992 , Page(s): 893 - 903
    Cited by:  Patents (8)
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    High-density, low-cost pin board matrix switches for automated main distributing frame (MDF) systems are described. The MDF system has two basic functions, cross connection and route setting for line test functions. These two functions can be performed automatically using a robot hand to insert a connecting pin into a crosspoint hole on the matrix board. Each crosspoint hole has four isolated cylindrical contacts that are connected to XA, YA , XB, and YB conductive patterns, which represent the A and B wires of a telephone set circuit. Corresponding to the four contacts of a crosspoint hole, a connecting pin has two spring contacts, one spring contact to connect X A and YA conductive patterns, and the other for connecting XB and YB conductive patterns. In addition, arrangements have been made to perform the route setting for line testing. A matrix board with crosspoint holes on a 1.5-mm grid has been attained using the low-contact-force design and minimum insulation spacing between the neighboring conductive patterns. The design also considers requirements for the robot hand interface. These pin board matrix switches allow the MDF system to be automated View full abstract»

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  • Thermomechanical assessment of plastic coated TAB chips

    Publication Year: 1992 , Page(s): 748 - 753
    Cited by:  Patents (1)
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    A bending beam technique was used to classify different plastic coating films by the shear stress exerted on the Si substrate. Tape-automated-bonded (TAB) test chips coated with the plastic materials were exposed to temperature cycling. By means of IR microscopy the extent of mechanical degradation of the inner lead bonds (cratering) was quantified. This degradation turned out to be clearly correlated with the deflection of the beam, which is a measure of the shear stress exerted by the plastic coating. Thus, the bending beam technique allows the assessment of the component's quality with respect to the thermal cycling stress View full abstract»

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  • Development and analysis of an automated test system for the thermal characterization of IC packaging technologies

    Publication Year: 1992 , Page(s): 615 - 624
    Cited by:  Papers (6)
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    The development of an automated test system for the thermal characterization of IC packages is reported. A range of thermal test chips which have also been developed is described. The thermal test system is discussed in detail in terms of the temperature sensor calibration algorithm and the error budget associated with junction-to-case thermal resistance measurements in an oven environment. A detailed discussion of the experimental errors and uncertainties is presented. A figure of ±4% has been obtained for both the accuracy and repeatability of an oven-based junction-to-case thermal resistance test method. This is shown to compare favorably with the performance of a temperature controlled heat sink system. By comparison with infrared thermal imaging, the measurement of the average chip junction temperature is shown to provide an accurate thermal resistance figure for conventional IC package structures. IC packages used to demonstrate the application of the test system and test chips to thermal characterization include DIPs, PGAs, and chip carriers View full abstract»

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  • Concurrent thermal designs of PCBs: balancing accuracy with time constraints

    Publication Year: 1992 , Page(s): 850 - 859
    Cited by:  Papers (9)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (976 KB)  

    A thermal design methodology suitable for concurrent design of cost-driven electronic systems is proposed and exemplified for a sample printed circuit board (PCB). The design methodology utilizes an evolutionary concept, in which the analysis tools are capable of adjusting their level of complexity as the design evolves, initiating with rough approximate analyses and culminating in a conjugate conduction/convection simulation for a portion of the sample board. The level of approximation included at each stage of the design is selected with consideration of both time and accuracy constraints. Furthermore, the importance of considering the conjugate problem in generating heat transfer correlations for electronic packages is discussed View full abstract»

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  • Comparison of plastic and hermetic microcircuits under temperature cycling and temperature humidity bias

    Publication Year: 1992 , Page(s): 640 - 650
    Cited by:  Papers (18)
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    Plastic and hermetic integrated circuits, as discrete packages and as assembled on circuit card assemblies, were temperature cycled between -55 and +85°C through 1000 cycles, and 26 parametric values were observed in terms of failure rates or shifts. The circuit card assemblies were then tested for up to 650 h at 85°C-85% relative humidity (RH). Circuit cards were also assembled using both plastic and hermetic versions of a custom IC, for comparison with each other as well as with an older discrete version of the card, which had a history of reliable operation for over 20 years. The IC version of the cards were coated with either urethane or parylene and, along with unassembled ICs, were tested for 1000 h at 85°C-85% RH with intermittent bias temperature, humidity, bias (THB). Conservative lifetime estimates, for both the plastic and the ceramic ICs, for avionics applications, were determined to be well over 20 years. It is concluded that, in this and similar applications, there is no reliability advantage for either plastic or ceramic ICs View full abstract»

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  • Compact liquid cooling system for small, moveable electronic equipment

    Publication Year: 1992 , Page(s): 786 - 793
    Cited by:  Papers (1)  |  Patents (31)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (720 KB)  

    The evaluation of a compact liquid cooling system is provided as a benchmark of self-contained heat exchanger units that can be used in small movable electronic equipment. The sealed system contains a fluid expansion chamber, a liquid-to-air heat exchanger core, a fan, and a pump that connects to a multichip module (MCM) package through a pair of flexible stainless steel hoses. Temperatures were recorded as a function of pressure, package power dissipation, and flow rate. The 5.5-L system can remove up to 274 W of power with a 52°C temperature drop from inlet liquid to air for a thermal resistance of 0. 19°C/W while pumping perfluorocarbon FC-72 at a flow rate of 1.1 L/min. Design criteria and improvements for a second generation system are proposed View full abstract»

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  • Thermal characterization of a PLCC-expanded Rjc methodology

    Publication Year: 1992 , Page(s): 691 - 698
    Cited by:  Papers (13)
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    In a previous study, it was proposed to extend the use of the junction-to-case thermal resistance, Rjc, to nonisothermal packages by defining an appropriately weighted, average surface temperature based on numerically derived `thermal influence' coefficients for each package surface (or segment) of interest. This expanded Rjc methodology is applied here to an actual plastic-leaded chip carrier (PLCC) package. Experimental data and the results of an extensive three-dimensional thermal simulation are used to establish the values of 11 sensitivity coefficients, which make it possible to determine the weighted average case temperature. The variations in the sensitivity coefficients and the accuracy of the chip temperature predictions, with the number of data sets used to determine the coefficients, are also examined View full abstract»

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  • A semi-analytical method to predict printed circuit board package temperatures

    Publication Year: 1992 , Page(s): 675 - 684
    Cited by:  Papers (6)
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    A quick, easy-to-use method is developed to predict steady-state temperatures on printed circuit boards (PCBs) subjected to heating by single or multiple heat sources. The method includes separate analytical solutions for the circuit board and for the chips to be mounted on the board. The board solution is developed using the Green's function method for solving the heat diffusion equation in the board. For the chip, the solution of the heat diffusion equation is obtained using the method of separation of variables. The temperature solution for the package is determined using an iterative procedure between the chip model and the board model. The accuracy of the method is verified by comparison with detailed finite element techniques View full abstract»

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  • Finite element modeling of a MMIC transmitter module for thermal/structural design optimization

    Publication Year: 1992 , Page(s): 723 - 729
    Cited by:  Papers (2)
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    The complex mechanical design of a monolithic microwave integrated circuit (MIMIC) transmitter module and successful integration of it into a higher assembly required that a comprehensive mechanical analytical approach be adopted. This was accomplished by designing and constructing an integrated thermal/structural finite element model of the module and the assembly. The thermal model consisted of a 3200-element primary model with a supplemental model of the output FET region, containing another 5000 elements. A structural version of the primary thermal model performed the structural analyses. A key feature of the model construction and use was the internal coupling of the primary and supplemental thermal models and the structural models, eliminating manual interfacing and approximations which should improve accuracy and speed View full abstract»

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  • The single chip versus multichip packaging option for digital CMOS in the 1990s

    Publication Year: 1992 , Page(s): 915 - 922
    Cited by:  Papers (3)
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    The level of functional density achievable in digital CMOS logic chips is so high that in the past systems implementations by multichip module (MCM) packaging appear to have been unnecessary, because the system was usually made up of only a few chips. However, rapidly increasing system sizes anticipated in the future will require many VLSI/ULSI CMOS chips per system, operating at near 100 MHz clock frequency. The authors have, therefore, reexamined the single-chip versus MCM packaging option for digital CMOS for the 1990s. They conclude that, for large-scale CMOS logic systems constructed by the use of many state-of-the-art VLSI/ULSI chips, the MCM packaging approach gives a manyfold improvement in packing density (3-8×), performance (up to 1.4×), and cost (1.2×) over the SCM packaging approach View full abstract»

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  • A coupled thermal magnetic model for high frequency transformers. II. Finite element implementation and validation

    Publication Year: 1992 , Page(s): 740 - 747
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (672 KB)  

    For pt.I see ibid., vol.15, no.5, p.730-9 (1992). In pt.I the governing equations, source terms, boundary conditions, and material property relationships for a high-frequency transformer model were derived. In the present work, a solution method for this model based on the finite element technique is developed and validated with both numerical comparisons and experimental data View full abstract»

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  • Planar magnetic component technology-a review

    Publication Year: 1992 , Page(s): 884 - 892
    Cited by:  Papers (18)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (892 KB)  

    The materials and the fabrication of planar magnetic components for switch mode power supplies (SMPSs) and other applications are reviewed. The advantages and the disadvantages of such devices are introduced. The magnetic materials used in the devices, such as ferrite, amorphous metallic glass, and thin and thick magnetic films, are detailed. The devices have varying degrees of planarization-partially planar devices with magnetic cores and planar windings and truly planar devices for integrated magnetic circuits with planar windings and planar magnetics. Devices of both types reported in the literature since 1979 are reviewed. The design of the planar magnetic components must be optimized with respect to losses, and design issues which relate to electrical, thermal, and mechanical performance are discussed View full abstract»

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  • Re-entrant cavity surface enhancements for immersion cooling of silicon multichip packages

    Publication Year: 1992 , Page(s): 815 - 822
    Cited by:  Papers (6)
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    The performance of silicon reentrant cavity structures for enhanced heat removal from substrates used in silicon multichip systems is described. The heat sink surface consisted of a large array of pyramidal cavities etched into the silicon using standard microelectronic fabrication techniques. Two different reentrant cavity shapes, simple and complex, were studied. A thin-film resistive heater fabricated on a silicon substrate served as the heat source. Experiments were conducted in a pool of the dielectric liquid, refrigerant-113, which has near-zero contact angles with most materials used in electronics fabrication. Tests were run for both saturated and subcooled conditions. The saturated pool boiling heat transfer characteristics of the cavity-enhanced surfaces were superior to those of a plain surface, resulting in a substantial decrease in both the temperature overshoot and the incipient boiling heat flux, and subcooling generally resulted in an increase in incipient boiling heat flux when compared with the saturated conditions View full abstract»

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  • Effect of microscale thermal conduction on the packing limit of silicon-on-insulator electronic devices

    Publication Year: 1992 , Page(s): 715 - 722
    Cited by:  Papers (22)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (728 KB)  

    Silicon-on-insulator (SOI) electronic circuits have a buried silicon dioxide layer which inhibits device cooling and reduces the thermal packing limit, the largest number of devices per unit substrate area for which the device operating temperature is acceptably low. Thermal analysis yields the packing limit of SOI MOSFET devices in terms of the targeted channel-to-substrate thermal conductance. Thermal conduction is microscale if it is significantly reduced by the boundary scattering of heat carriers, phonons in silicon and electrons in aluminum. Microscale effects are negligible above room temperature, but may reduce the packing limit by 44% for a substrate temperature of 77 K View full abstract»

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Aims & Scope

This Transaction ceased production in 1993. The current publication is titled IEEE Transactions on Components, Packaging, and Manufacturing Technology.

Full Aims & Scope