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2007 7th International Conference on ASIC

Date 22-25 Oct. 2007

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  • [Front cover]

    Publication Year: 2007, Page(s): c1
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  • 2007 7th International Conference on ASIC

    Publication Year: 2007, Page(s): i
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  • ASICON 2007 Sponsorship

    Publication Year: 2007, Page(s): ii
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  • ASICON 2007 Organization

    Publication Year: 2007, Page(s):iii - vii
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  • Welcome to ASICON 2007

    Publication Year: 2007, Page(s): viii
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  • Table of contents

    Publication Year: 2007, Page(s):ix - lii
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  • Author's index

    Publication Year: 2007, Page(s):liii - lxiii
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  • K-1 The RF-CMOS story: From university research to industry mainstream

    Publication Year: 2007, Page(s): 1
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    Little did we know in 1994 that the early stirrings of interest to push easily-accessible CMOS multiproject chips to RF applications would lead, ten years later, to a new way of realizing RF microelectronics. Today RF-CMOS is the mainstream, high volume production technology for single-chip radios in cellphones and wireless LANs. It is proving to be more than a cheap replacement for BiCMOS: the in... View full abstract»

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  • K-2 High-performance and low-Power SRAMs design in nano-scale CMOS technology

    Publication Year: 2007, Page(s): 2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (173 KB)

    Summary form only given. Static random access memory (SRAM) is key to today's high-performance and low-power VLSI system design. Among various embedded memory technologies, SRAM is able to provide the highest performance while maintaining low standby power consumption. As Moore's law drives the CMOS technology feature size well below 100 nm regime, there are many new technology and design challeng... View full abstract»

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  • K-3 The challenge of design flow integration and its impact on complex system design

    Publication Year: 2007, Page(s): 3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (39 KB)

    The design of complex systems is composed of an ever increasing number of individual steps starting from architectural exploration, logic and physical implementation to methods for improving the manufacturability of chips and systems. Much of the emphasis of tool development and flow composition has been focused on the quality of the individual steps. For example, the evaluation if a logic synthes... View full abstract»

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  • K-4 Video compression LSI: Past, present, and future trends

    Publication Year: 2007, Page(s): 4
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    In 1995, MPEG-2 became a video coding international standard. Since then, a wide variety of video compression LSIs have been developed and actually deployed in many applications such as digital HDTV broadcasting, TV conference, mobile and so forth. Since video coding technology is essential to the efficient storage and transmission of video data, it continues to play an important role in ubiquitou... View full abstract»

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  • K-5 Challenges for consumer electronics for the 21st century

    Publication Year: 2007, Page(s):5 - 7
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (82 KB) | HTML iconHTML

    CE products now drive the electronic industry's development. (It was previously driven by military programs after World War II, mainframes and minicomputers in the 1950s through the 1970s, and the Personal Computer in the 1980s and 1990s). CE products demand high performance, low cost, and low power consumption. These requirements stress every aspect of design from the circuit to the system level.... View full abstract»

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  • T1 Design of integrated RF front-ends in submicron and deep submicron CMOS technologies

    Publication Year: 2007, Page(s): 8
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    Summary form only given. The design of front-end electronics in CMOS technology are described in this presentation. Both low-voltage/low-power and high performance aspects of front-ends for highly-integrated radio transceivers are treated, using low-noise amplifier, power amplifier driver, mixer and voltage-controlled oscillator blocks as examples. In addition, the limitations and advantages of on... View full abstract»

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  • T2 A/D converters for wireless communication in nanometer CMOS

    Publication Year: 2007, Page(s): 9
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (26 KB)

    Summary form only given.Topics covered with CMOS quick scaling down, more and more components are integrated into a SOC chip. The economic incentive is strong in pursuing single-chip, CMOS integration of wireless communication transceivers. Spearheaded by the proliferation of digital processing techniques, the mainstream CMOS technology has recently evolved into the nanometer regime. Albeit the ma... View full abstract»

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  • T3 SOC design flow case study: Design a video processing pipeline

    Publication Year: 2007, Page(s): 10
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (31 KB)

    Topics Covered With CMOS quick scaling down, more and more components are integrated into a SOC chip. How to design a complex SOC chip is becoming a very challenging topic. In this tutorial, we will use our design experience on a video processing pipeline to illustrate the complete design flow for a SOC system. A video processing pipeline consists video signal demodulation, video decoding (H.264/M... View full abstract»

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  • T4 Inductance extraction and compact modeling of inductively coupled interconnects in the presence of process variations

    Publication Year: 2007, Page(s): 11
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    In this tutorial, we will shed some light on an inductive extraction and compact modeling of inductively coupled interconnects, especially in the presence of unavoidable fabrication variations in the technology of 90 nm and below. The tutorial consists of two parts. The first part of the tutorial will describe the existing partial element equitant circuit (PEEC) based inductance extraction methods... View full abstract»

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  • T5 What makes Moore’s law continue? — Recent advances in semiconductor

    Publication Year: 2007, Page(s): 12
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    Summary form only given. Many people wandered whether Moore's law could continue at 90 nm and beyond about 4 years ago. Apparently, we have survived, and Moore's law has continued, and is still continuing. In this tutorial, it will explore what has made Moore's law continued, and what is making Moore's law continuing. The tutorial will first review issues and challenges in semiconductor, the crisi... View full abstract»

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  • Electrostatic Discharge (ESD) and latchup in advanced semiconductors

    Publication Year: 2007, Page(s): 13
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (28 KB) | HTML iconHTML

    This paper focuses on semiconductor device layout and design, design integration, digital receiver design, off-chip drivers, and ESD power clamps. The paper discussed ESD test models (HBM, MM, and CDM), ESD testing techniques, failure mechanisms, and electro-thermal models (eg. Wunsch-Bell). In addition, the section discussed ESD in diodes, and MOSFETs. This was followed on how to construct ESD ci... View full abstract»

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  • Software defined cognitive radios

    Publication Year: 2007, Page(s): 14
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (28 KB)

    The wide proliferation of wireless services and applications with increasing bandwidth needs is rapidly creating a spectrum shortage. However, the problem is caused primarily by inefficient legacy spectrum allocation policies, so that even when some applications suffer from lack of bandwidth, there is idle capacity in other bands. To deal with this challenge, the FCC, ITU and other regulatory orga... View full abstract»

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  • SOC design challenges for embedded systems

    Publication Year: 2007, Page(s):15 - 19
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2901 KB) | HTML iconHTML

    Nowadays, LSIs can integrates billions of transistors on a chip. This means that a system or systems can be implemented in a LSI. Therefore in order to support new requirements of SOC (System on Chip) the LSI design methodology is required to be changed. SOC's are used inside embedded systems. In SOC design, it is required to achieve (1) system level optimization (2) application specific solution ... View full abstract»

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  • Design of a dynamic memory access scheduler

    Publication Year: 2007, Page(s):20 - 23
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (108 KB) | HTML iconHTML

    Computer systems are becoming increasingly limited by memory performance. A dynamic SDRAM access scheduler (DSAS) according to modern SDRAM technology and memory access scheduling algorithms is proposed in this paper. Based on SDR-SDRAM technology and new version AMBA AXI bus, DSAS dynamically schedules the accesses to SDRAM and reduces precharge time. A modularized configurable automatic verifica... View full abstract»

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  • A self-control structure for pipeline control

    Publication Year: 2007, Page(s):24 - 27
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (124 KB) | HTML iconHTML

    This paper describes a 1.8-V, 8-bit, 125 Msample/s analog-to-digital converter (ADC) with a power-efficient architecture designed in a 0.18-mum CMOS technology. Through sharing an amplifier between two successive pipeline stages, the converter is realized with just three amplifiers and a separate sample-and-hold block. It employs a wide-bandwidth low-power wide-swing gain-boosting folded-cascode a... View full abstract»

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  • A novel dynamic scheduling algorithm of data hazard for embedded processor

    Publication Year: 2007, Page(s):28 - 31
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (86 KB) | HTML iconHTML

    To solve the data hazard of embedded processor, this paper designs a dynamic scheduling algorithm to improve the pipeline efficiency, which only increases one single-instruction buffer and some combination logic. In FFT and FIR experiment, the algorithm leads to the decrease of the pipeline conflict to 100% and 75% respectively. There is 8.2% additional area of the whole processor. View full abstract»

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  • A novel framework for fast embedded face detection system

    Publication Year: 2007, Page(s):32 - 35
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (114 KB) | HTML iconHTML

    In this paper, we propose a novel design for one fast embedded face detection system, which can be applied in many real-time applications, such as teleconferencing, user interfaces, and security access control. Our framework includes 3 parts: one fast face detection method based on optimized AdaBoost algorithm with high speed and high detection rate, one SOC hardware framework to speed up detectio... View full abstract»

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  • A microarchitecture of clustered superscalar processor

    Publication Year: 2007, Page(s):36 - 39
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (108 KB) | HTML iconHTML

    Superscalar processor requires many of high ports and large on-chip structures to extract ILP in applications. And those components are often laid on the critical path, consume huge power and limit the scalability of superscalar. Clustered microarchitecture is an attractive alternative to large monolithic superscalar designs due to their potential for dealing with many problems faced in modern mic... View full abstract»

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