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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Issue 1 • Date Jan. 2008

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Table of contents

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information

Editorial

CMP Fill Synthesis: A Survey of Recent Studies

Encoding Large Asynchronous Controllers With ILP Techniques

Two-Dimensional Schemes for Clocking/Timing of QCA Circuits

Technology Mapping Using Logical Effort for Solving the Load-Distribution Problem

A Time-Domain Oscillator Envelope Tracking Algorithm Employing Dual Phase Conditions

FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design

Simultaneous Escape-Routing Algorithms for Via Minimization of High-Speed Boards

System-Level Dynamic Thermal Management for High-Performance Microprocessors

A Reactive and Cycle-True IP Emulator for MPSoC Exploration

Experimental Characterization of CMOS Interconnect Open Defects

Unspecified Transition Faults: A Transition Fault Model for At-Speed Fault Simulation and Test Generation

X-Press: Two-Stage X-Tolerant Compactor With Programmable Selector

A Scalable Statistical Static Timing Analyzer Incorporating Correlated Non-Gaussian and Gaussian Parameter Variations

Reduction of Parametric Failures in Sub-100-nm SRAM Array Using Body Bias

Fixing Design Errors With Counterexamples and Resynthesis

ANN- and PSO-Based Synthesis of On-Chip Spiral Inductors for RF ICs

Primary Input Vectors to Avoid in Random Test Sequences for Synchronous Sequential Circuits

Mining Global Constraints With Domain Knowledge for Improving Bounded Sequential Equivalence Checking

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