# IEEE Transactions on Circuits and Systems II: Express Briefs

## Filter Results

Displaying Results 1 - 25 of 26

Publication Year: 2007, Page(s):C1 - C4
| PDF (38 KB)
• ### IEEE Transactions on Circuits and Systems—II: Express Briefs publication information

Publication Year: 2007, Page(s): C2
| PDF (37 KB)
• ### Voltage Gain Analysis of Integrated Fibonacci-Like Charge Pumps for Low Power Applications

Publication Year: 2007, Page(s):929 - 933
Cited by:  Papers (14)
| | PDF (687 KB) | HTML

This paper presents an analysis of the achievable voltage gain in integrated Fibonacci-like charge pumps. The analysis is carried out by using a mathematical model based on a matrix description of the network which takes parasitic capacitances into account. The impact of top- and bottom-plate parasitics over the voltage gain is discussed and the analytical expression of the voltage gain as a funct... View full abstract»

• ### Design Considerations for a Direct RF Sampling Mixer

Publication Year: 2007, Page(s):934 - 938
Cited by:  Papers (9)
| | PDF (302 KB) | HTML

This brief presents a detailed time-domain and frequency-domain analysis of a direct RF sampling mixer. Design considerations such as incomplete charge sharing and large signal nonlinearity are addressed. An accurate frequency-domain transfer function is derived. Estimation of noise figure is given. The analysis applies to the design of sub-sampling mixers that have become important for software-d... View full abstract»

• ### A 0.5–5-GHz Wide-Range Multiphase DLL With a Calibrated Charge Pump

Publication Year: 2007, Page(s):939 - 943
Cited by:  Papers (32)
| | PDF (2425 KB) | HTML

A 0.5-5 GHz wide-range multiphase delay-locked loop (MDLL) with a calibrated charge pump is presented. A multiperiod-locked technique is used to enhance the input frequency range of a MDLL and avoid the harmonic-locked problem. The charge pump current is also calibrated to reduce the static phase error. This MDLL has been fabricated in 0.13- CMOS process. The measured root-mean-square and peak-to-... View full abstract»

• ### Two CMOS Current Feedback Operational Amplifiers

Publication Year: 2007, Page(s):944 - 948
Cited by:  Papers (15)
| | PDF (495 KB) | HTML

Two internally compensated CMOS current-feedback operational amplifiers are discussed in this paper. The circuits are entirely made up of class AB stages, thereby increasing slew rate and drive capability, avoiding many of the drawbacks incurred by previous CMOS and even bipolar implementations. Experimental results on one prototype fabricated in a 0.35-mum process using a 20-pF load and supplied ... View full abstract»

• ### Impact of Sampling Clock Phase Noise on $Sigma Delta$ Frequency Discriminators

Publication Year: 2007, Page(s):949 - 953
Cited by:  Papers (4)
| | PDF (519 KB) | HTML

SigmaDelta frequency discriminators (SigmaDeltaFDs) convert instantaneous frequency deviations of a carrier signal to digital. They are used for decoding narrowband phase or frequency modulated signals in communication receivers, self calibration of RF frequency synthesizers and in digital phase locked loops. In this paper, the impact of reference (sampling) clock phase noise on a SigmaDeltaFD's s... View full abstract»

• ### An Ultra-Low-Power and Portable Digitally Controlled Oscillator for SoC Applications

Publication Year: 2007, Page(s):954 - 958
Cited by:  Papers (39)  |  Patents (2)
| | PDF (641 KB) | HTML

In this paper, a novel ultra-low-power digitally controlled oscillator (DCO) with cell-based design for system-on-chip (SoC) applications is presented. Based on the proposed segmental delay line (SDL) and hysteresis delay cell (HDC), the power consumption can be saved by 70% and 86.2% in coarse-tuning and fine-tuning stages, respectively, as compared with conventional approaches. Besides, the prop... View full abstract»

• ### Technique for Flicker Noise Up-Conversion Suppression in Differential LC Oscillators

Publication Year: 2007, Page(s):959 - 963
Cited by:  Papers (4)
| | PDF (288 KB) | HTML

A novel technique for the suppression of the flicker noise up-conversion in a differential LC oscillator topology is proposed. Relaxation mechanism and tunable noise filtering of the relaxation thresholds provide simultaneous suppression of differential pair and bias transistor flicker noise contributions. The proposed technique is validated on a fully monolithic oscillator architecture and 0.35-m... View full abstract»

• ### A Low-Voltage 5-GHz Downconversion Mixer Employing A Second Harmonic Injection Linearization Technique

Publication Year: 2007, Page(s):964 - 968
Cited by:  Papers (8)
| | PDF (204 KB) | HTML

In this paper, a low-voltage CMOS mixer topology, appropriate for operation in the 5-GHz frequency band, is presented. The mixer combines several design techniques in order to achieve high linearity performance with minimum current consumption in a restricted 1-V supply. The proposed mixer utilizes an integrated transformer to improve the high frequency performance and to achieve large LO to RF is... View full abstract»

• ### Even Order Harmonic Series-L/Parallel-Tuned Class-E Frequency Multiplier

Publication Year: 2007, Page(s):969 - 973
Cited by:  Papers (1)
| | PDF (168 KB) | HTML

In this brief, we propose a new class-E frequency multiplier based on the recently introduced series-L/parallel-tuned class-E amplifier. The proposed circuit produces even-order output harmonics. Unlike previously reported solutions the proposed circuit can operate under 50% duty ratio which minimizes the conduction losses. The circuit also offers the possibility for increased maximum operating fr... View full abstract»

• ### Lower Bounds for Constant Multiplication Problems

Publication Year: 2007, Page(s):974 - 978
Cited by:  Papers (44)  |  Patents (2)
| | PDF (154 KB) | HTML

Lower bounds for problems related to realizing multiplication by constants with shifts, adders, and subtracters are presented. These lower bounds are straightforwardly calculated and have applications in proving the optimality of solutions obtained by heuristics. View full abstract»

• ### A Low-Jitter Spread Spectrum Clock Generator Using FDMP

Publication Year: 2007, Page(s):979 - 983
Cited by:  Papers (21)  |  Patents (2)
| | PDF (1768 KB) | HTML

A 1.5 GHz spread spectrum clock generator (SSCG) is realized by a fractional N frequency synthesizer with a third-order delta-sigma modulator and a fractional dual-modulus prescaler (FDMP). This FDMP utilizes a fractional division ratio to have a small phase step to improve the jitter performance. This SSCG has been fabricated in a 0.18 um CMOS process, and it consumes 34.2 mW from a supply... View full abstract»

• ### Power-Efficient VLSI Realization of a Complex FSM for H.264/AVC Bitstream Parsing

Publication Year: 2007, Page(s):984 - 988
Cited by:  Papers (1)
| | PDF (716 KB) | HTML

This paper presents a systematic, power-efficient design methodology for the complex finite state machine (FSM) implementation of H.264/AVC decoding. The proposed FSM orchestrates the decoding steps and predicts the type of incoming codeword based on current FSM states and input symbols. The VLSI realization shows a gate count reduction of 14% and an average power reduction of 37.6% in real-time v... View full abstract»

• ### On the Parameter Estimation of 2-D Moving Average Random Fields

Publication Year: 2007, Page(s):989 - 993
Cited by:  Papers (3)
| | PDF (195 KB) | HTML

The problem of estimating the parameters of 2-D homogeneous moving average (MA) random fields only from output measurements is addressed. A novel computationally efficient algorithm for the estimation of the parameters of a minimum-phase 2-D MA model with a nonsymmetric half-plane (NSHP) region of support (ROS) is proposed. Using the 2-D spectral factorization, relationship between the NSHP MA mod... View full abstract»

• ### A Sequential Constrained Least-Square Approach to Minimax Design of 2-D FIR Filters

Publication Year: 2007, Page(s):994 - 998
Cited by:  Papers (16)
| | PDF (322 KB) | HTML

The solution to minimax design of 2-D finite-impulse response filter is not necessarily unique. This paper presents a sequential constrained least-square (SCLS) method to obtain a minimax filter with least total squared error. The method converts the minimax design into a series of constrained least-square problems with the same cost function but different magnitude constraints. By producing the s... View full abstract»

• ### A New Method for Designing Causal Stable IIR Variable Fractional Delay Digital Filters

Publication Year: 2007, Page(s):999 - 1003
Cited by:  Papers (18)
| | PDF (505 KB) | HTML

This paper studies the design of causal stable Farrow-based infinite-impulse response (IIR) variable fractional delay digital filters (VFDDFs), whose subfilters have a common denominator. This structure has the advantages of reduced implementation complexity and avoiding undesirable transient response when tuning the spectral parameter in the Farrow structure. The design of such IIR VFDDFs is base... View full abstract»

• ### On Multiscroll Chaotic Attractors in Hysteresis-Based Piecewise-Linear Systems

Publication Year: 2007, Page(s):1004 - 1008
Cited by:  Papers (9)  |  Patents (3)
| | PDF (344 KB) | HTML

This brief analyzes the multi scroll chaotic attractors in hysteresis-based piecewise-linear systems. The dynamics of the chaotic attractors are first analyzed. The unstable limit cycles and the boundary conditions for the occurrences of chaotic behaviors are derived. The sensitivity of systems parameters on the chaotic behaviors is also studied, accompanied by a number of simulations. View full abstract»

• ### Sinusoidal and Relaxation Oscillations in Source-Coupled Multivibrators

Publication Year: 2007, Page(s):1009 - 1013
Cited by:  Papers (18)
| | PDF (161 KB) | HTML

The paper considers the differential equation describing sinusoidal and relaxation oscillations of the source-coupled multivibrator. The transition from one form of oscillations to another, when the coupling capacitor is increasing, is explained by modifications in the shape of the central branch of the isocline of horizontal tangents on the phase plane of this differential equation. The formulas ... View full abstract»

• ### Sliding-Mode Amplitude Control Techniques for Harmonic Oscillators

Publication Year: 2007, Page(s):1014 - 1018
Cited by:  Papers (4)
| | PDF (353 KB) | HTML

This paper investigates both theoretical and implementation-level aspects of switching-feedback control strategies for the development of harmonic oscillators. We use sliding-mode compensation based on various norms of the system state to achieve amplitude control over a wide-tuning range. A 7.6-MHz I/Q LC oscillator is developed and tested. Measurements show that implementation of the proposed sw... View full abstract»

• ### Stabilization of Nonlinear Systems via Periodically Intermittent Control

Publication Year: 2007, Page(s):1019 - 1023
Cited by:  Papers (75)
| | PDF (212 KB) | HTML

This brief studies the exponential stabilization problem for a class of nonlinear systems by means of periodically intermittent control. An exponential stability criterion given in terms of a set of linear matrix inequalities, together with a simpler sufficient condition determined by three scalar inequalities, is presented. A suboptimal intermittent controller is designed with respect to the gene... View full abstract»

• ### Corrections to "Exact and numerically stable closed-form expressions for potential coefficients of rectangular conductors"

Publication Year: 2007, Page(s): 1024
| | PDF (48 KB) | HTML

First Page of the Article
View full abstract»

• ### 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2008)

Publication Year: 2007, Page(s): 1025
| PDF (773 KB)

Publication Year: 2007, Page(s): 1026
| PDF (318 KB)

Publication Year: 2007, Page(s): 1027
| PDF (358 KB)

## Aims & Scope

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Chi K. Michael Tse
Dept. of Electronic and Information Engineering
Hong Kong Polytechnic University
Hunghom, Hong Kong
cktse@ieee.org