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# IEEE Transactions on Electron Devices

### Early Access Articles

Early Access articles are made available in advance of the final electronic or print versions. Early Access articles are peer reviewed but may not be fully edited. They are fully citable from the moment they appear in IEEE Xplore.

## Filter Results

Displaying Results 1 - 25 of 92
• ### Calibration of Bulk Trap-Assisted Tunneling and Shockley-Read-Hall Currents and Impact on InGaAs Tunnel-FETs

Publication Year: 2017, Page(s):1 - 5
| | PDF (1282 KB)

The tunnel-FET (TFET) is a promising candidate for future low-power logic applications, because it enables a sub-60-mV$/$decade subthreshold swing. However, the most experimental TFETs are plagued by unwanted trap-assisted tunneling (TAT) and Shockley-Read-Hall (SRH) carrier generation, which degrade the swing and increase the leakage floor, hence forming a major roadblock for TFET adoption. This ... View full abstract»

• ### Numerical Investigation of High-Voltage Partial Buried P/N-Layer SOI LDMOS

Publication Year: 2017, Page(s):1 - 9
| | PDF (2528 KB)

High-voltage lateral double-diffused MOSFETs with partial buried P/N-type silicon layers (PBPL/PBNL) in silicon-on-insulator (SOI) technology are investigated numerically. In the lateral direction, the partial buried silicon layer (PBL) can introduce an additional electric field peak, which improves the surface electric field distribution and increases the charge accommodation in the drift region.... View full abstract»

• ### Memory Performance of a Simple Pr0.7Ca0.3MnO₃-Based Selectorless RRAM

Publication Year: 2017, Page(s):1 - 4
| | PDF (1255 KB)

Enhancement of nonlinearity (NL) in low-resistance state (LRS) currents of resistance random access memory (RRAM) devices is a key challenge for the selectorless RRAM array. The conventional approach is based on adding multiple dielectrics, e.g., tunnel layers to enable NL at the expense of stack simplicity. In this brief, we present a PrPr0.7Ca0.3MnO₃ (PCMO)-based selectorless RRAM device ... View full abstract»

• ### Tolerance Studies on an Inverse Magnetron Injection Gun for a 2-MW 170-GHz Coaxial-Cavity Gyrotron

Publication Year: 2017, Page(s):1 - 7
| | PDF (1859 KB)

The magnetron injection gun (MIG) is the most critical part of any gyrotron. Small tolerances in the manufacturing process and alignment of the subcomponents directly affect the electron beam quality and therefore the beam wave interaction. At the Karlsruhe Institute of Technology (KIT), an innovative new Inverse MIG (IMIG) is proposed for the European 2-MW 170-GHz coaxial-cavity gyrotron which is... View full abstract»

• ### DC 30-GHz DPDT Switch Matrix Design in High Resistivity Trap-Rich SOI

Publication Year: 2017, Page(s):1 - 7
| | PDF (2048 KB)

This paper presents low insertion loss, high isolation, ultra-wideband double-pole-double-throw (DPDT) switch matrix designed in a 0.13-μm commercial high resistivity trap-rich silicon-on-insulator (SOI) CMOS process for the first time. The switches are designed using series-shunt-series configuration in a ring-type structure with input and output matching networks. Transistor width and tra... View full abstract»

• ### Influence of Drain Doping Engineering on the Ambipolar Conduction and High-Frequency Performance of TFETs

Publication Year: 2017, Page(s):1 - 7
| | PDF (1617 KB)

In this paper, the effect of a proposed drain doping engineering on the ambipolar conduction and high-frequency performance of tunneling FETs (TFETs) is investigated using 2-D TCAD simulations. The proposed TFET structure is based on using a high-doped region above a low-doped region of the drain side. It is demonstrated that when splitting the drain into two regions, one with high doping above th... View full abstract»

• ### Gate Leakage Mechanisms in AlInN/GaN and AlGaN/GaN MIS-HEMTs and Its Modeling

Publication Year: 2017, Page(s):1 - 7
| | PDF (3183 KB)

Gate leakage mechanisms in AlInN/GaN and AlGaN/GaN metal insulator semiconductor high-electron-mobility transistors (MIS-HEMTs) with SiNₓ as gate dielectric have been investigated. It is found that the conduction in the reverse gate bias is due to Poole-Frenkel emission for both MIS-HEMTs. The dominant conduction mechanism in low to medium forward bias is trap-assisted tunneling while it is... View full abstract»

• ### Study of a GaN-Based LED With an Al/AZO Composite Transparent Conductive Layer

Publication Year: 2017, Page(s):1 - 5
| | PDF (1878 KB)

A new and simple Al/aluminum-doped zinc oxide (AZO) composite structure is proposed to act as a transparent conductive layer (TCL) for GaN-based LEDs. The Al/AZO composite layers effectively improve the current spreading performance, compared with an AZO TCL. Experimentally, the specific contact resistance of the studied Al/AZO LED is reduced by about 27.6%, compared with an AZO LED. In add... View full abstract»

• ### Analytical Drain Current Model for Amorphous InGaZnO Thin-Film Transistors at Different Temperatures Considering Both Deep and Tail Trap States

Publication Year: 2017, Page(s):1 - 7
| | PDF (2963 KB)

Surface-potential-based drain current model is presented for amorphous InGaZnO thin-film transistors considering both exponential deep and tail trap states densities in the energy gap. The trap states densities are determined by the numerical calculation on the basis of the assumption that the trapped carrier concentration is much higher than the free carrier concentration. The analytical drain cu... View full abstract»

• ### Simulation Study of 4H-SiC UMOSFET Structure With p⁺-polySi/SiC Shielded Region

Publication Year: 2017, Page(s):1 - 6
| | PDF (1239 KB)

In this paper, we propose an enhanced efficiency 4H-SiC U-shaped trench-gate MOSFET (UMOSFET) structure. The proposed device structure takes an advantage of a p⁺-polySi/SiC shielded region to reduce the on-state specific resistance. We show that the heterojunction diode formed by the p⁺-polySi and the n-drift regions improves the body diode effect, and thereby, reduces the reverse re... View full abstract»

• ### Analytical Drain Current Model of 1-D Ballistic Schottky-Barrier Transistors

Publication Year: 2017, Page(s):1 - 8
| | PDF (882 KB)

A new analytical model based on the Wentzel-Kramers-Brillouin approximation for MOSFET-like 1-D ballistic transistors with Schottky-Barrier contacts has been developed for the drain current. By using a proper approximation of both the Fermi-Dirac distribution function and transmission probability, an analytical solution for the Landauer integral was obtained, which overcomes the limitations of exi... View full abstract»

• ### A Threshold Voltage Model of Tri-Gate Junctionless Field-Effect Transistors Including Substrate Bias Effects

Publication Year: 2017, Page(s):1 - 7
| | PDF (1725 KB)

In this paper, the influence of substrate bias voltage and substrate-induced surface potential (SISP) on threshold voltage of tri-gate junctionless field-effect transistors (TG-JLFETs) has been investigated. For this purpose, a quasi-3-D threshold voltage model of TG-JLFETs is presented considering the effects of both back-bias voltage and a lightly doped substrate. To incorporate the effect of SI... View full abstract»

• ### Backward-Wave Oscillator Operating in Low Magnetic Fields Using a Hybrid-TE₁₁ Mode

Publication Year: 2017, Page(s):1 - 7
| | PDF (1987 KB)

We present the design of a backward-wave oscillator based on a novel slow-wave structure (SWS) operating under low magnetic field conditions (<0.2 T). The design features a high-power electron beam interacting in dual synchronism with TM₀₁ and hybrid TE₁₁ modes. By exploiting mode control techniques, low magnetic fields with asymmetrical beam trajectories, a dominant... View full abstract»

• ### Fabrication of InGaAs-on-Insulator Substrates Using Direct Wafer-Bonding and Epitaxial Lift-Off Techniques

Publication Year: 2017, Page(s):1 - 8
| | PDF (3319 KB)

Defect less semiconductor-on-insulator (-OI) by a cost-effective and low-temperature process is strongly needed for monolithic 3-D integration. Toward this, in this paper, we present a cost-effective fabrication of the indium gallium arsenide-OI structure featuring the direct wafer bonding (DWB) and epitaxial lift-off (ELO) techniques as well as the reuse of the indium phosphide donor wafer. We sy... View full abstract»

• ### Wideband Power Combining of Four Microfabricated W-Band Traveling-Wave Tubes

Publication Year: 2017, Page(s):1 - 8
| | PDF (2164 KB)

Wideband power combining of four W-band microfabricated traveling-wave tubes (TWTs) is presented. The proposed TWTs are based on a planar helix slow-wave structure (SWS) with straight-edge connections (PH-SEC) that can be microfabricated with stripline input-output feed. A novel 1:4 WR-10 waveguide-to-stripline power divider-combiner is designed that covers the frequency range of 92-104 GHz. The s... View full abstract»

• ### Comparative Study of RESURF Si/SiC LDMOSFETs for High-Temperature Applications Using TCAD Modeling

Publication Year: 2017, Page(s):1 - 6
| | PDF (1308 KB)

This paper analyses the effect of employing an Si on semi-insulating SiC (Si/SiC) device architecture for the implementation of 600-V LDMOSFETs using junction isolation and dielectric isolation reduced surface electric field technologies for high-temperature operations up to 300 °C. Simulations are carried out for two Si/SiC transistors designed with either PN or silicon-on-insulator (SOI) ... View full abstract»

• ### Analysis of Atomistic Dopant Variation and Fermi Level Depinning in Nanoscale Contacts

Publication Year: 2017, Page(s):1 - 7
| | PDF (2391 KB)

Using quantum transport simulations of metal-semiconductor junctions, we assess the viability of barrier thinning with dopants and barrier lowering with interfacial layers as solutions for contact resistivity in nanoscale transistors. Our atomistic simulations show that the discreteness of dopants leads to increasing variability in contact resistance as dimensions scale below 10 nm. We find that t... View full abstract»

• ### Light Extraction Enhancement of GaN-Based Light-Emitting Diodes With Textured Sidewalls and ICP-Transferred Nanohemispherical Backside Reflector

Publication Year: 2017, Page(s):1 - 6
| | PDF (3619 KB)

Textured-sidewall GaN-based light-emitting diodes (LEDs) with convex and 45° patterns and an inductively coupled plasma (ICP)-transferred nanohemispherical backside reflector, formed using an ICP etching process, are fabricated and studied. For devices with textured sidewalls, the scattering probability of photons at the GaN/air interface is increased and the light extraction efficiency is ... View full abstract»

• ### Topologically Protected AC Transport Induced by Spin-Orbit Interaction in H-Shaped Silicene Nanojunction

Publication Year: 2017, Page(s):1 - 5
| | PDF (2852 KB)

The linear ac transport properties are theoretically studied in H-shaped zigzag silicene nanojunction. We numerically calculated the dc conductance and ac emittance by considering the nearest-neighbor hopping, the second-nearest-neighbor spin-orbit interaction (SOI), and external electric field, based on the tight-binding approach and the ac transport theory. It is found that the relatively large ... View full abstract»

• ### Analytical Model for 2DEG Density in Graded MgZnO/ZnO Heterostructures With Cap Layer

Publication Year: 2017, Page(s):1 - 7
| | PDF (1464 KB)

In this paper, we develop a generic analytical model for 2-D electron gas (2DEG) density (ns) and threshold voltage (VOFF) of a fully strained graded ZnO-based heterostructure with a cap layer. The model is based on the continuity of electric field at the interfaces of different layers, dominant piezoelectric and spontaneous polarization components in different layers, Mg composition, and layer th... View full abstract»

• ### Highly Tunable Narrow Bandpass MEMS Filter

Publication Year: 2017, Page(s):1 - 7
| | PDF (1488 KB)

We demonstrate a proof-of-concept highly tunable narrow bandpass filter based on electrothermally and electrostatically actuated microelectromechanical-system (MEMS) resonators. The device consists of two mechanically uncoupled clamped-clamped arch resonators, designed such that their resonance frequencies are independently tuned to obtain the desired narrow passband. Through the electrothermal an... View full abstract»

• ### Büttiker Probe-Based Modeling of TDDB: Application to Dielectric Breakdown in MTJs and MOS Devices

Publication Year: 2017, Page(s):1 - 9
| | PDF (1889 KB)

Dielectric layers are gradually being downscaled in different electronic devices like MOSFETs and magnetic tunnel junctions (MTJ) with shrinking device sizes. As a result, time dependent dielectric breakdown has become a major issue in such devices. In this paper we propose a generalized way of modeling the stress-induced leakage current (SILC) and postbreakdown current (PBC) due to time dependent... View full abstract»

• ### Device-Circuit Analysis of Ferroelectric FETs for Low-Power Logic

Publication Year: 2017, Page(s):1 - 9
| | PDF (2754 KB)

Ferroelectric FETs (FEFETs) are emerging devices with an immense potential to replace conventional MOSFETs by virtue of their steep switching characteristics. The ferroelectric (FE) material in the gate stack of the FEFET exhibits negative capacitance resulting in voltage step-up action which entails sub-60 mV/decade subthreshold swing at room temperature. The thickness of the FE layer (TFE) is an... View full abstract»

• ### Compact On-Wafer Test Structures for Device RF Characterization

Publication Year: 2017, Page(s):1 - 7
| | PDF (2894 KB)

The main objective of this paper is to validate the radio frequency (RF) characterization procedure based on compact test structures compatible with 50-μm-pitch RF probes. It is shown that by using these new test structures, the layout geometry and hence the on-chip space consumption for complete sets of passive and active devices, e.g., coplanar waveguide transmission lines and RF MOSFETs,... View full abstract»

• ### The Impact of an Ultrathin Y₂O₃ Layer on GeO₂ Passivation in Ge MOS Gate Stacks

Publication Year: 2017, Page(s):1 - 5
| | PDF (2080 KB)

This paper investigates the impact of an atomic layer-deposited Y₂O₃ dielectric on the passivation of a GeO₂ layer in GeO₂-based Ge gate stacks. The equivalent oxide thickness scalability and thermal stability of the ultrathin Y₂O₃ layer are evaluated at different Y₂O₃ thicknesses and annealing conditions in detail. Experimental results show ... View full abstract»

## Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy