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IEEE Design & Test of Computers

Issue 3 • May-June 2007

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  • [Front cover]

    Publication Year: 2007, Page(s): c1
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  • IEEE Computer Society Digital Library Information

    Publication Year: 2007, Page(s): c2
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  • Call for Papers: Special Issue on Design and Test of RFIC Chips

    Publication Year: 2007, Page(s): 209
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  • Table of contents

    Publication Year: 2007, Page(s):210 - 211
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  • Supporting cost-effective innovation

    Publication Year: 2007, Page(s): 212
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  • [Masthead]

    Publication Year: 2007, Page(s): 213
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  • Guest Editors' Introduction: IR Drop in Very Deep-Submicron Designs

    Publication Year: 2007, Page(s):214 - 215
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  • A Production IR-Drop Screen on a Chip

    Publication Year: 2007, Page(s):216 - 224
    Cited by:  Papers (15)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (651 KB) | HTML iconHTML

    Many modern designs have large, localized failures due to excessive power consumption, which can be measured as IR drop. The methodology described here employs an on-chip process-monitoring circuit that is easy to integrate on chip and use in a characterization or production environment, to help identify and localize IR-drop hot spots and power-related failures. View full abstract»

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  • Call for Papers: The Current State of Test Compression

    Publication Year: 2007, Page(s): 225
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  • Modeling Power Supply Noise in Delay Testing

    Publication Year: 2007, Page(s):226 - 234
    Cited by:  Papers (19)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (552 KB) | HTML iconHTML

    Excessive power supply noise during test can cause overkill. This article discusses two models for supply noise in delay testing and their application to test compaction. The proposed noise models avoid complicated power network analysis, making them much faster than existing power noise analysis tools. can cause performance degradation and View full abstract»

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  • Advertiser/Product Index

    Publication Year: 2007, Page(s): 235
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  • Power Supply Noise in SoCs: Metrics, Management, and Measurement

    Publication Year: 2007, Page(s):236 - 244
    Cited by:  Papers (44)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1046 KB) | HTML iconHTML

    Power integrity is emerging as a major challenge in deep-submicron SoC designs. The lack of predictability is complicating timing closure, physical design, production test, and speed grading of SoCs. This article describes and validates two metrics that quantify the impact of power supply noise. The IC industry is moving quickly to adopt new deep-submicron (DSM) technologies that offer unprecedent... View full abstract»

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  • Call for Papers: Special Issue on Silicon Debugging and Diagnosis

    Publication Year: 2007, Page(s): 245
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  • Power Grid Physics and Implications for CAD

    Publication Year: 2007, Page(s):246 - 254
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1971 KB) | HTML iconHTML

    This article describes a full-die dynamic model of an Intel Pentium IV microprocessor design. The authors show that transient supply noise is sensitive to nonuniform decoupling-capacitor distribution, and that supply-drop locality is a tight function of frequency and package-die resonance, leading to significant localized resonant effects. View full abstract»

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  • IEEE Computer Society Information

    Publication Year: 2007, Page(s): 255
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  • Analysis of Power Supply Noise in the Presence of Process Variations

    Publication Year: 2007, Page(s):256 - 266
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (511 KB) | HTML iconHTML

    Characterizing the impact of variability on circuit performance measurements (delay, power, and signal integrity) is necessary to avoid chip failure. The authors present a comprehensive methodology for analyzing the impact of device and metal variations on the power supply noise, and hence the signal integrity, of on-chip power grids. View full abstract»

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  • Software 2007 Editorial Calendar

    Publication Year: 2007, Page(s): 267
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  • Scan-Based Tests with Low Switching Activity

    Publication Year: 2007, Page(s):268 - 275
    Cited by:  Papers (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (270 KB) | HTML iconHTML

    Supply current and power dissipation during scan-based test can be far higher than during normal circuit operation because of increased switching activity caused by the tests. In this paper, we propose a method that fills unspecified entries in test cubes to reduce the switching activity caused by scan tests simultaneously during the scan-shift and capture cycles. Our method doesn't require additi... View full abstract»

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  • Power Droop Testing

    Publication Year: 2007, Page(s):276 - 284
    Cited by:  Papers (22)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (316 KB) | HTML iconHTML

    High-performance digital ICs manufactured in deep-submicron technologies tend to draw considerable amounts of power during operation. Power droop describes the impact of power consumption transients on the logic values of a circuit's signal lines and, ultimately, on the correctness of the circuit's operation. Although power droop could cause an IC to fail, such failures cannot be screened during t... View full abstract»

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  • Subscribe to CiSE [advertisement]

    Publication Year: 2007, Page(s): 285
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  • Everything but the kitchen sink [review of Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms by Kogel, T. et al.; 2006]

    Publication Year: 2007, Page(s):286 - 287
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  • CEDA Currents

    Publication Year: 2007, Page(s):288 - 289
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  • Distributed Systems Online [advertisement]

    Publication Year: 2007, Page(s): 290
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  • DATC Newsletter

    Publication Year: 2007, Page(s): 291
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  • TTTC Newsletter

    Publication Year: 2007, Page(s): 292
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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty