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Power Electronics, IEEE Transactions on

Issue 4 • Date July 2007

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Displaying Results 1 - 25 of 55
  • Table of contents

    Publication Year: 2007 , Page(s): C1 - C4
    Save to Project icon | Request Permissions | PDF file iconPDF (47 KB)  
    Freely Available from IEEE
  • IEEE Transactions on Power Electronics publication information

    Publication Year: 2007 , Page(s): C2
    Save to Project icon | Request Permissions | PDF file iconPDF (38 KB)  
    Freely Available from IEEE
  • Cost-Effective Zero-Voltage and Zero-Current Switching Current-Fed Energy-Recovery Display Driver for ac Plasma Display Panel

    Publication Year: 2007 , Page(s): 1081 - 1088
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (837 KB) |  | HTML iconHTML  

    A new cost-effective zero-voltage and zero-current switching (ZVZCS) current-fed energy-recovery display driver for a plasma display panel (PDP) is proposed. It features a simpler structure, less mass, and lower cost of production. Furthermore, since all power switches are turned on or off under zero-voltage or zero-current switching, it has several favorable advantages such as an improved electromagnetic interference (EMI), low switching losses, and reduced burden on the cooling system. Particularly, since the current source built in the inductor can compensate the large gas-discharge current, main inverter switches have the reduced current stress and turn-on timing margin. Therefore, the undesirable voltage notch problem caused by the improperly controlled gate signal can be solved, which enables the panel to light at lower voltage such as 143 V compared with about 165 V of the prior circuit. To confirm the operation, validity, and features of the proposed circuit, experimental results from a prototype built with 6-in test PDP are presented. View full abstract»

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  • High-Performance and Low-Cost Single-Switch Current-Fed Energy Recovery Circuit for ac Plasma Display Panel

    Publication Year: 2007 , Page(s): 1089 - 1097
    Cited by:  Papers (19)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (759 KB) |  | HTML iconHTML  

    A high-performance and low-cost single-switch current-fed energy recovery circuit (ERC) for an alternating current (ac) plasma display panel (PDF) is proposed. Since it is composed of only one power switch compared with the conventional circuit consisting of four power switches and two large energy recovery capacitors, it features a much simpler structure and lower cost. Furthermore, since all power switches can be switched under soft-switching operation, the proposed circuit has desirable merits such as an increased reliability, and low switching loss. Especially, there are no serious voltage notches across the PDP with the aid of gas discharge current compensation, which can greatly reduce the current stress of all inverter switches, and provide those switches with the turn on timing margin. To confirm the validity of the proposed circuit, its operation and performance were verified on a prototype for 7-in test PDP. View full abstract»

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  • Study of Igniter in Low-Frequency Square Wave Electronic Ballasts for Metal Halide Lamps

    Publication Year: 2007 , Page(s): 1098 - 1106
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1141 KB) |  | HTML iconHTML  

    Metal halide lamps (MHLs) have serious acoustic resonance problem. The most widely used method to achieve acoustic-resonance free is to use low-frequency square wave (LFSW) electronic ballasts. There are two ignition methods commonly used in LFSW electronic ballast: high-frequency resonance ignition and additional pulse igniter. This paper analyzed the problems during ignition while using the conventional additional pulse igniter and proposed some solutions. A novel high-frequency resonance igniter is also proposed, where no extra semiconductors and feedback control circuit are needed to perform the ignition. High-voltage ignition pulses are obtained by utilizing the fast polarity inversion of the output voltage of full-bridge inverter. Theoretical analysis, simulation, and experiment results of a prototype for 70-W MHLs verified the effectiveness of both the proposed solutions and the igniter. View full abstract»

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  • A Voltage and Frequency Droop Control Method for Parallel Inverters

    Publication Year: 2007 , Page(s): 1107 - 1115
    Cited by:  Papers (291)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1036 KB) |  | HTML iconHTML  

    In this paper, a new control method for the parallel operation of inverters operating in an island grid or connected to an infinite bus is described. Frequency and voltage control, including mitigation of voltage harmonics, are achieved without the need for any common control circuitry or communication between inverters. Each inverter supplies a current that is the result of the voltage difference between a reference ac voltage source and the grid voltage across a virtual complex impedance. The reference ac voltage source is synchronized with the grid, with a phase shift, depending on the difference between rated and actual grid frequency. A detailed analysis shows that this approach has a superior behavior compared to existing methods, regarding the mitigation of voltage harmonics, short-circuit behavior and the effectiveness of the frequency and voltage control, as it takes the R to X line impedance ratio into account. Experiments show the behavior of the method for an inverter feeding a highly nonlinear load and during the connection of two parallel inverters in operation. View full abstract»

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  • Digital Control of Three-Phase Series-Parallel Uninterruptible Power Supply Systems

    Publication Year: 2007 , Page(s): 1116 - 1127
    Cited by:  Papers (26)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (990 KB) |  | HTML iconHTML  

    In this paper, a new digital deadbeat controller is designed, implemented, and applied to a three-phase series-parallel line-interactive uninterruptible power supply (UPS). This kind of UPS system provides input power factor correction, output voltage conditioning, and high efficiency. The objective of the controller is to achieve deadbeat dynamic response for the parallel and series converters. The proposed controller adjusts the current of the parallel converter and voltage of the series converter with two and four sampling periods, respectively. A reduced-parts topology is also introduced that has less number of power electronics components as well as switching functions. The power flow of the system in the presence of current and voltage harmonics is discussed. Simulation and experimental results are presented, which show the viability of the proposed controller for this topology. View full abstract»

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  • Capacitor Voltage Balance for the Neutral-Point- Clamped Converter using the Virtual Space Vector Concept With Optimized Spectral Performance

    Publication Year: 2007 , Page(s): 1128 - 1135
    Cited by:  Papers (33)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2037 KB) |  | HTML iconHTML  

    This paper presents a new pulsewidth modulation (PWM) for the complete control of the neutral-point voltage in the three-level three-phase neutral-point-clamped (NPC) direct current-alternating current (dc-ac) converter. The balancing of the neutral-point voltage is achieved over the full range of converter output voltages and for all load power factors with the minimum output voltage distortion at around the switching frequency. The simple phase duty-ratio expressions in d-q-0 coordinates that define this modulation are presented. The performance of this modulation approach and its benefits over other previously proposed solutions are verified through simulation and experiments. View full abstract»

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  • Design of a Soft-Switched 6-kW Battery Charger for Traction Applications

    Publication Year: 2007 , Page(s): 1136 - 1144
    Cited by:  Papers (29)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1082 KB) |  | HTML iconHTML  

    Auxiliary power converters for traction rolling stock applications have to operate under difficult conditions, including high-input voltages which are subject to wide fluctuations, high temperatures, and harsh environmental constraints. Additionally there is often a need for silent operation, which implies switching frequencies above 20 kHz. Increasingly, high-frequency DC-DC converters are being used for these applications, with their advantages of reduced size and weight. However, the requirement to accommodate high-input voltages and switch at high frequencies is challenging for a conventional hard-switched converter based on IGBTs, which makes soft-switching topologies an attractive alternative. This paper presents the design strategy for a zero-voltage switched (ZVS) 6-kW battery charger switching at 20 kHz using IGBTs. This paper illustrates how the design is a tradeoff between managing the hard-switch turn-on losses at light load, minimizing the duty cycle loss caused by soft-switching delays, and minimizing the effects of tail current-switching losses. These tradeoffs affect the selection of the ZVS capacitors, the determination of the series inductance value, the transformer turns ratio, and the selection of the IGBTs to be used. Design details, theoretical predictions, and experimental results are presented in this paper for the conversion system that was developed. View full abstract»

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  • High-Power Density Design of a Soft-Switching High-Power Bidirectional dc–dc Converter

    Publication Year: 2007 , Page(s): 1145 - 1153
    Cited by:  Papers (78)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1476 KB) |  | HTML iconHTML  

    A bidirectional dc-dc converter typically consists of a buck and a boost converters. In order to have high-power density, the converter can be designed to operate in discontinuous conducting mode (DCM) such that the passive inductor can be minimized. The DCM operation associated current ripple can be alleviated by interleaving multiphase currents. However, DCM operation tends to increase turnoff loss because of a high peak current and its associated parasitic ringing due to the oscillation between the inductor and the device output capacitance. Thus, the efficiency is suffered with the conventional DCM operation. Although to reduce the turnoff loss a lossless capacitor snubber can be added across the switch, the energy stored in the capacitor needs to be discharged before device is turned on. This paper adopts a gate signal complimentary control scheme to turn on the nonactive switch and to divert the current into the antiparalleled diode of the active switch so that the main switch can be turned on under zero-voltage condition. This diverted current also eliminates the parasitic ringing in inductor current. For capacitor value selection, there is a tradeoff between turnon and turnoff losses. This paper suggests the optimization of capacitance selection through a series of hardware experiments to ensure the overall power loss minimization under complimentary DCM operating condition. According to the suggested design optimization, a 100-kW hardware prototype is constructed and tested. The experimental results are provided to verify the proposed design approach. View full abstract»

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  • Radio-Frequency Inverters With Transmission-Line Input Networks

    Publication Year: 2007 , Page(s): 1154 - 1161
    Cited by:  Papers (18)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (808 KB) |  | HTML iconHTML  

    A soft-switching inverter topology (the Class Phi ) is presented which draws dc source current through a transmission line or a lumped-network approximation of a distributed line. By aligning the inverter switching frequency just below the line's lambda/4-wave resonance, the Class Phi topology enforces odd-and even-harmonic content in its drain voltage and input current, respectively. The symmetrizing action of the transmission-line dynamics results in natural square-wave operation of the switch, reducing the inverter stresses (relative to a Class E) for a given power throughput. The inverter waveforms and normalized power-output capability are analyzed in simple terms, and supported by measurements of an inverter built around a length of distributed line, and an inverter incorporating a lumped L-C ladder network. The latter implementation is constructed with air-core magnetics and inter-layer capacitances that are integrated into the thickness of a printed-circuit board. A comparison with a Class E inverter of similar size and ratings demonstrates the small passive-component values and manufacturing advantages afforded by the Class Phi topology. View full abstract»

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  • Monolithic/Modularized Voltage Regulator Channel

    Publication Year: 2007 , Page(s): 1162 - 1176
    Cited by:  Papers (9)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (4045 KB) |  | HTML iconHTML  

    To achieve higher power density and design flexibility with unlimited phase number, the concept of monolithic/modularized voltage regulator channel (MVRC) is introduced to be a generic power integrated circuit (IC) solution for both central processing unit (CPU) and point-of-load (POL) power management. Novel control architecture and analog circuits are invented to implement the MVRC concept. Tolerance analysis and hardware testing verified that the MVRC approach is suitable for today's and even future's microprocessor power management. View full abstract»

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  • Zero-Current Soft-Switching Performance of 1200-V PT Clustered Insulated Gate Bipolar Transistor

    Publication Year: 2007 , Page(s): 1177 - 1185
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (849 KB) |  | HTML iconHTML  

    Zero-current soft-switching performance of a 1200-V, 20-A punch-through (PT) clustered insulated gate bipolar transistor (CIGBT) is evaluated in this paper. Turn-on over-voltage transients have been witnessed in 2D numerical simulations and experimental results. These have been shown to be influenced by circuit parameters and internal device structure. Conductivity modulation lag within the device is found to be dependant upon dI/dt; however, this alone does not explain the significant over-voltages at turn-on. The device structure is found to influence the magnitude of such voltage peaks. By optimization of the structure, over-voltages can be minimized, resulting in a significant improvement in losses compared to an IGBT. The current bump associated with zero-current turn-off has been analyzed under various dV/dt values and is influenced by circuit capacitance, switching timings, and carrier lifetime. Internal dynamics of the CIGBT have been analyzed to give an insight into the performance under zero-current switching (ZCS). ZCS tests at 600 V, 20 A have shown that the CIGBT performs well with respect to a commercial IGBT of the same rating. Dynamic saturation voltage of the CIGBT has been shown to be 15% lower at room temperatures to that of an equivalent IGBT. View full abstract»

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  • Nonlinear Control of Voltage-Source Converter Systems

    Publication Year: 2007 , Page(s): 1186 - 1195
    Cited by:  Papers (15)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (435 KB) |  | HTML iconHTML  

    The nonlinear control method, associated with the books of A. Isidori, H. Nijmeijer, and A. J. van der Shaft, has so far been applied to the STATCOM (system order, N = 3). There have been two impediments to progress in applying the method: 1) difficulty in synthesizing the nonlinear transformation which is the key to the method; 2) the advanced mathematical language which makes the aforesaid books generally inaccessible. This paper describes the successful application of the nonlinear control method to control systems based on back-to-back pulsewidth modulation voltage-source converter. This paper is written in a tutorial form to explain how the nonlinear control method can be applied without using the advanced mathematical language. The SSSC and the UPFC (system order, N = 5) are chosen as illustrative examples. View full abstract»

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  • A Comparative Study of Boundary Control With First- and Second-Order Switching Surfaces for Buck Converters Operating in DCM

    Publication Year: 2007 , Page(s): 1196 - 1209
    Cited by:  Papers (49)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1529 KB) |  | HTML iconHTML  

    A performance comparison of boundary control with the first-(sigma1) and second-order(sigma2) switching surfaces for buck converters operating in discontinuous conduction mode (DCM) is presented in this paper. Performance attributes under investigation include the average output voltage, output ripple voltage, switching frequency, parametric sensitivities to the component values, and large signal characteristics. Due to the presence of the output hysteresis band, an additional switching boundary formed by the zero-inductor-current trajectory is created. This phenomenon causes a shift of the operating point in converters with sigma1. Conversely, the operating point remains unchanged in converters with sigma2. As well as in continuous conduction mode (CCM), sigma2 can make the converter revert to the steady-state in two switching actions in DCM and gives better static and dynamic responses than in both CCM and DCM. Most importantly, its control law and settings are applicable for both modes. Experimental results of a prototype are found to be in good agreement with theoretical predictions. View full abstract»

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  • Nonlinear Modeling of DC/DC Converters Using the Hammerstein's Approach

    Publication Year: 2007 , Page(s): 1210 - 1221
    Cited by:  Papers (14)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (979 KB) |  | HTML iconHTML  

    This paper deals with the modelling of highly nonlinear switching power-electronics converters using black-box identification methods. The duty cycle and the output voltage are chosen, respectively, as the input and the output of the model. A nonlinear Hammerstein-type mathematical model, consisting of a static nonlinearity and a linear time-invariant model, is considered in order to cope with the well-known limitations of the more common small-signal models, i.e. the entity of the variations of the variables around a well-defined steady-state operating point and the incorrect reproduction of the steady-state behavior corresponding to input step variations from the above steady-state operating point. The static nonlinearity of the Hammerstein model is identified from input-output couples measured at steady state for constant inputs. The linear model is identified from input-output data relative to a transient generated by a suitable pseudorandom binary sequence constructed with two input values used to identify the nonlinearity. The identification procedure is, first, illustrated with reference to a boost DC/DC converter using results of simulations carried out in the PSpice environment as true experimental results. Then, the procedure is experimentally applied on a prototype of the above converter. In order to show the utility of the Hammerstein models, a PI controller is tuned for a nominal model. Simulation and experimental results are displayed with the aim of showing the peculiarities of the approach that is followed. View full abstract»

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  • FPGA-Based Adaptive Backstepping Sliding-Mode Control for Linear Induction Motor Drive

    Publication Year: 2007 , Page(s): 1222 - 1231
    Cited by:  Papers (20)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (785 KB) |  | HTML iconHTML  

    A field-programmable gate array (FPGA)-based adaptive backstepping sliding-mode controller is proposed to control the mover position of a linear induction motor (LIM) drive to compensate for the uncertainties including the friction force. First, the dynamic model of an indirect field-oriented LIM drive is derived. Next, a backstepping sliding-mode approach is designed to compensate the uncertainties occurring in the motion control system. Moreover, the uncertainties are lumped and the upper bound of the lumped uncertainty is necessary in the design of the backstepping sliding-mode controller. However, the upper bound of the lumped uncertainty is difficult to obtain in advance of practical applications. Therefore, an adaptive law is derived to adapt the value of the lumped uncertainty in real time, and an adaptive backstepping sliding-mode control law is the result. Then, an FPGA chip is adopted to implement the indirect field-oriented mechanism and the developed control algorithms for possible low-cost and high-performance industrial applications. The effectiveness of the proposed control scheme is verified by some experimental results. With the adaptive backstepping sliding-mode controller, the mover position of the FPGA-based LIM drive possesses the advantages of good transient control performance and robustness to uncertainties in the tracking of periodic reference trajectories. View full abstract»

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  • Simple Low-Cost Hysteretic Controller for Single-Phase Synchronous Buck Converters

    Publication Year: 2007 , Page(s): 1232 - 1241
    Cited by:  Papers (30)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (918 KB) |  | HTML iconHTML  

    This paper presents a simple low-cost control architecture for low-voltage hysteretic regulators supplying loads with low-to-medium current consumption. Only two sensed voltages, a passive filter network and a hysteretic comparator are required to implement the main control functions: the output voltage regulation and the adaptive voltage positioning. This paper also shows that other previously reported low-cost control solutions have an important design tradeoff between load transient response and efficiency. In the proposed controller, the closed-loop output impedance can be designed to be resistive and the switching frequency can be adjusted to be independent of the output impedance requirement so that the load transient response and the efficiency can be optimized separately. Experimental results validate the performance of the proposed controller (i.e., a load transient response with insignificant output voltage overshoot and selectable switching frequency independent of the output impedance requirement). View full abstract»

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  • Advanced Control and Analysis of Cascaded Multilevel Converters Based on P-Q Compensation

    Publication Year: 2007 , Page(s): 1242 - 1252
    Cited by:  Papers (24)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1195 KB) |  | HTML iconHTML  

    This paper introduces new controls for the cascaded multilevel power converter. This converter is also sometimes referred to as a ldquohybrid converterrdquo since it splits high-voltage/low-frequency and low-voltage/pulsewidth-modulation (PWM)-frequency power production between ldquobulkrdquo and ldquoconditioningrdquo converters respectively. Cascaded multilevel converters achieve higher power quality with a given switch count when compared to traditional multilevel converters. This is a particularly favorable option for high power and high performance applications such as naval ship propulsion. This paper first presents a new control method for the topology using three-level bulk and conditioning inverters connected in series through a three-phase load. This control avoids PWM frequency switching in the bulk inverter. The conditioning inverter uses a capacitor source and its control is based on compensating the real and reactive (P-Q) power difference between the bulk inverter and the load. The new control explicitly commands power into the conditioning inverter so that its capacitor voltage remains constant. A unique space vector analysis of hybrid converter modulation is introduced to quantitatively determine operating limitations. The conclusion is then generalized for all types of controls of the hybrid multilevel converters (involving three-level converter cells). The proposed control methods and analytical conclusions are verified by simulation and laboratory measurements. View full abstract»

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  • Bandwidth Improvements for Peak-Current Controlled Voltage Regulators

    Publication Year: 2007 , Page(s): 1253 - 1260
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1662 KB) |  | HTML iconHTML  

    To ensure the current sharing among the interleaved phases, the peak-current control is widely used in the voltage regulator (VR) applications. Meanwhile, to save the cost and footprint by reducing the output capacitance, high control bandwidths are mandatory. Because of the sample-hold effect in the peak-current loop, there exist stringent challenges to the high-bandwidth designs for VRs. In this paper, the influence from the sample-hold effect is investigated to clarify the difference between the VR and conventional applications. After that, two approaches for higher bandwidth are introduced. To decrease the phase delay due to the sample-hold related double poles, excessive external ramps are inserted to the modulators. To increase the effective sampling frequency, the phase inductor currents are coupled, either by the coupled-inductor structure or through the feedback control. In addition, a small-signal model including the sample-hold effect is derived for the coupled-inductor buck to explain the improvement. High-bandwidth designs are verified by the simulation and experimental results. A bandwidth of one-third switching frequency is demonstrated with a coupled-inductor VR. View full abstract»

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  • Synchronous–Asynchronous Digital Voltage-Mode Control for DC–DC Converters

    Publication Year: 2007 , Page(s): 1261 - 1268
    Cited by:  Papers (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1624 KB) |  | HTML iconHTML  

    This paper investigates a mixed synchronous/asynchronous digital voltage-mode controller for DC-DC converters. In the proposed control architecture, the turn-on switching event is determined asynchronously by comparing the converter output voltage and a synchronously generated voltage ramp driven by the digital control using a low-resolution digital-to-analog converter. Switch turn-off is determined synchronously by the system clock. In the proposed approach, the derivative action of the proportional-integral-derivative voltage-mode controller is inherently obtained by the frequency modulation, without requiring the digital computation of the derivative action. A simplified small-signal model is also derived in order to analyze the performance achievable by the proposed solution. This control architecture features good dynamic performance, and frequency modulation during transients. Simulation and experimental results on a synchronous buck converter, where the digital control has been implemented in field programmable gate array, confirm the effectiveness of the proposed solution. View full abstract»

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  • Uniform Voltage Distribution Control for Series Connected DC–DC Converters

    Publication Year: 2007 , Page(s): 1269 - 1279
    Cited by:  Papers (32)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2723 KB) |  | HTML iconHTML  

    This paper investigates applications of current-mode, shared-bus commercial-off-the-shelf (COTS) dc-dc converters to power system architectures configured as parallel-input, series-output (PISO) and series-input, parallel-output (SIPO). By employing a PISO (or SIPO) architecture, current-mode COTS converters can transform their system input voltage to higher (or lower) system output voltage, provide ease and flexibility of power expansion, and preserve system efficiencies equal to those of standalone converters. Nonuniform output (or input) voltages still exist within a PISO (or SIPO) power system using identical converters when the system lacks proper distribution control of the series connected output (or input) voltages-and thus, system reliability suffers from thermal overstress to the converters that contribute a greater portion of the output power. Through unified approaches of voltage distribution control for the PISO and SIPO architectures, a series-connected converter power system attains robust stability and reliability. Two effective approaches to uniform voltage distribution control-the central-limit and maximum-limit voltage distribution-will be discussed. Both computer simulation and experimental prototypes validate both of the uniform voltage distribution power converter architectures. View full abstract»

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  • A Comparative Analysis of Real-Time Algorithms for Power Signal Decomposition in Multiple Synchronous Reference Frames

    Publication Year: 2007 , Page(s): 1280 - 1289
    Cited by:  Papers (45)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (993 KB) |  | HTML iconHTML  

    The monitoring and rejection of voltage and current harmonics in power electronics applications such as power quality conditioners or distributed generation systems require correct estimation algorithms especially if the harmonic amplitudes are time varying. Power signal decomposition in multiple synchronous rotating reference frames (MSRFs) is considered one of the best solutions. The most commonly employed implementations of this signal transformation are based on phase-locked loops (PLLs), recursive discrete Fourier transforms (RDFT), or discrete Kalman filtering (DKF). In this paper, a rigorous analysis of the performance of these implementations has been carried out. Complete tests have been performed to evaluate the computational burden, the frequency domain response, and the tolerance to low frequency amplitude variations. The results make it possible to select the proper method depending on the requirements of each application. View full abstract»

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  • A Smart Power Integrated Circuit Educational Tool

    Publication Year: 2007 , Page(s): 1290 - 1302
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1477 KB) |  | HTML iconHTML  

    This paper describes a course in Smart Power based on the introduction of an innovative educational tool-a preprocessed Smart Power integrated circuit. The methodology used to introduce students to the issue of Smart Power design, resorting to low cost standard CMOS technology is presented. The theoretical support is envisaged to provide the required knowledge to specify characteristics and performance of the most common blocks used in Smart Power and to develop skills for monolithic integration. Through design, simulation, and experimental characterization, the students were able to experience the different steps of a Smart Power project, from the power device basic switching cell mask layout to the final system prototype, in 60 hours of a one semester course. The referred Smart Power Integrated Circuit (IC) embedding analog and digital basic blocks and high-voltage transistor arrays is the key idea to the presented pedagogical methodology. Based on this Smart Power IC, different topologies required by power electronics and power management systems were implemented. A complete system illustrative example-a step-down hard-switching dc-dc regulator (buck regulator)-implemented by the students is shown and discussed. View full abstract»

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  • Design of Gradient Oxide-Bypassed Superjunction Power MOSFET Devices

    Publication Year: 2007 , Page(s): 1303 - 1310
    Cited by:  Papers (13)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2602 KB) |  | HTML iconHTML  

    The superjunction MOSFET power devices, such as p-n column superjunction (named SJ or CoolMOS) devices and oxide-bypassed (OB) devices, are highly recognized for their higher blocking capability and lower on-state resistance. However, the performance of SJ devices is greatly handicapped due to difficulties in formation of perfect charge-balanced SJ p-n columns by the current process technology, especially for devices with small widths and voltage ratings below 180 V. OB devices can be an alternative in this voltage region, which utilize the well established oxide thickness control in fabrication instead of the difficult doping control as in SJ devices. However, OB drift region electric field distribution is not as optimal as that in SJ devices. Gradient oxide-bypassed (GOB) structure enhances the performance of OB devices so that it can achieve a performance comparable to that of an ideal p-n column SJ device in the medium voltage range, and at the same time, requires simple process technology. Complete descriptions on the GOB device and related design issues are presented in this paper. Fabrication issues are also discussed with possible sacrificial materials and etchants for making the vertical graded oxide sidewalls. Design cases for 80, 120, and 180 V GOB devices are also illustrated for better understanding in the device. View full abstract»

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Aims & Scope

IEEE Transactions on Power Electronics covers fundamental technologies used in the control and conversion of electric power.

Full Aims & Scope