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IEE Proceedings G - Circuits, Devices and Systems

Issue 4 • Date Aug. 1992

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Displaying Results 1 - 19 of 19
  • Low-voltage BICMOS vertical OTA

    Publication Year: 1992, Page(s):553 - 556
    Cited by:  Papers (2)  |  Patents (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (268 KB)

    A linear BICMOS operational transconductance amplifier (OTA) with low voltage supply requirements is presented. Two versions of this circuit using stacked and folded BICMOS composite transistors are discussed. Simulations and experimental results using transistor arrays are shown that verify the operating principle of the proposed structures.<> View full abstract»

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  • Performance trade-offs of globally clocked data-driven arrays

    Publication Year: 1992, Page(s):527 - 533
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (558 KB)

    The support of digital signal processing and control algorithms within cellular arrays is well established. The algorithms that tend to be supported are those with a high degree of homogeneity; however, there are many functions that involve feedback loops and conditionality and, topologically, this can lead to irregular layouts which require resynchronisation mechanisms to ensure that data arrive ... View full abstract»

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  • Go/no-go testing of analogue macros

    Publication Year: 1992, Page(s):534 - 540
    Cited by:  Papers (12)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (490 KB)

    A time-domain go/no-go testing strategy for analogue integrated circuit macros is presented. The strategy is based on exciting an analogue macro with a pseudo-random binary sequence and measuring the transient response generated at the external nodes, thereby eliminating the need for intermediate probing. Four methods of analysing the transient response data are discussed. Of these methods, the re... View full abstract»

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  • On the design of VLSI arrays for discrete Fourier transform

    Publication Year: 1992, Page(s):541 - 552
    Cited by:  Papers (12)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1049 KB)

    In this paper the design of VLSI arrays for the discrete Fourier transform (DFT) is investigated through three topics: (1) algorithm exploitation, derivation and analysis, array realisation, and schemes to calculate arbitrarily long length DFT using a reasonable sized array. Four DFT systolic algorithms are examined and compared in terms of computing parallelism and computational complexity. Among... View full abstract»

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  • Parameter identification approach to fault diagnosis of switched capacitor circuits

    Publication Year: 1992, Page(s):467 - 472
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (415 KB)

    The authors deal with fault diagnosis of switched capacitor circuits. The application of parameter identification techniques to the fault diagnosis of switched capacitor circuits is considered. The technique is based on identifying the discrete time transfer function coefficients of the circuit under test from time-domain response. Application of the technique to different examples is illustrated.... View full abstract»

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  • Compatibility of switched capacitor filters with VLSI processes

    Publication Year: 1992, Page(s):413 - 418
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (405 KB)

    The authors demonstrate the compatibility of switched-capacitor filters with VLSI processes. Conditions to obtain linear and precise input-to-output voltage relationships in networks containing nonlinear capacitors are derived. Having satisfied these conditions, considerations about the alternatives for capacitor implementations show the realisability of SC filters in any digital MOS process.< View full abstract»

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  • Design of zero-phase spherically symmetric N-dimensional IIR digital filters

    Publication Year: 1992, Page(s):419 - 426
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (663 KB)

    The authors present a new method for designing zero-phase N-dimensional IIR digital filters satisfying given amplitude design specifications. The method is based on applying the N-dimensional extension of McClellan transformation to the square of a one-dimensional IIR digital filter design recently proposed by Charalambous (1988). The resulting N-dimensional digital filter is of zero-phase and hyp... View full abstract»

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  • Simple methods for the design of 2D recursive digital filters with noncircular cutoff boundary

    Publication Year: 1992, Page(s):427 - 437
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (833 KB)

    The authors present several methods for the design of 2D filters with noncircular cutoff boundaries. One-dimensional filters are used as the main building block and other building blocks are formed by various transformations. It is shown that cascading an appropriate number of these building blocks will yield a 2D filter approximating to the desired cutoff boundary. The proposed methods are very s... View full abstract»

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  • Recursive Hartley filter-a new efficient digital-prefilter structure

    Publication Year: 1992, Page(s):438 - 444
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (480 KB)

    Generation of various prefiltering characteristics from the recursive Hartley filter (RHF) is introduced. The RHF can be regarded as a new family of digital-prefilter structures and is the only prefilter proposed to have the ability to design the lowpass, bandpass and highpass digital filters simultaneously. These prefilters can be combined with appropriately designed equalisers based on equirippl... View full abstract»

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  • Associative memory integrated circuit based on neural mutual inhibition

    Publication Year: 1992, Page(s):445 - 449
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (399 KB)

    Hardware associative or content-addressable memory (CAM) which finds in one operation the nearest match to input data among several templates is very crucial in the design of effective pattern recognition systems. The authors call this type of memory a relaxative CAM (RCAM) as opposed to the traditional exact-match CAM design. A compact implementation of an RCAM calls for the employment of a neura... View full abstract»

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  • Design of switched-capacitor FIR filters with application to a low-power MFSK receiver

    Publication Year: 1992, Page(s):450 - 466
    Cited by:  Patents (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (964 KB)

    Finite impulse response (FIR) switched-capacitor (SC) filters for minimum frequency-shift keying (MFSK) demodulation techniques have been developed and are discussed. The proposed filters comprise combinations of the following building blocks: sample-and-hold circuits, even-odd delay circuits, Gillingham delay circuits, recharge memory elements, Lee-martin summer circuits, recharge summer circuits... View full abstract»

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  • Exact noise figure of a noisy two-port with feedback

    Publication Year: 1992, Page(s):473 - 476
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (236 KB)

    Exact expressions for the noise figure of a two-port with shunt or series feedback are presented in terms of standard four-noise parameters and imittance parameters. The general case of an arbitrary feedback network, characterised in terms of a two-port imittance matrix, is analysed and the results are applied to the more practical case of a single lossless feedback element. The results are presen... View full abstract»

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  • Specification of error amplifiers for use in feedforward transmitters

    Publication Year: 1992, Page(s):477 - 480
    Cited by:  Papers (14)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (315 KB)

    The performance of a feedforward amplifier, in terms of the linearity improvement which can be achieved, is investigated mathematically. The improvement in linearity is shown to depend on the gain and phase matching throughout the system, and two methods are demonstrated whereby this may be predicted using sensitivity analysis. Finally, the result is used to examine the trade-offs involved in the ... View full abstract»

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  • Generalised approach to automatic custom layout of analogue ICs

    Publication Year: 1992, Page(s):481 - 490
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (940 KB)

    An automatic custom analogue IC layout methodology is presented which employs primitive cell recognition, critical net analysis, and self-constructive floorplanning and routing techniques. Based on this methodology, a general-purpose analogue circuit module layout generator, SLAM, has been developed. Given the schematic netlist of an arbitrary analogue MOS circuit module, SLAM can quickly generate... View full abstract»

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  • Voltage-mode and current-mode Sallen-Key implementations based on translinear conveyors

    Publication Year: 1992, Page(s):491 - 497
    Cited by:  Papers (7)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (480 KB)

    The simulation results of two Sallen-Key bandpass implementations with standard operational amplifiers are compared and discussed. The implementation using a voltage follower as a controlled source compares favourably with the one using equal valued passive components. Voltage-mode and current-mode Sallen-Key implementations from translinear conveyors with unity gain are described. The filters use... View full abstract»

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  • 100 Mbit/s adaptive data compressor design using selectively shiftable content-addressable memory

    Publication Year: 1992, Page(s):498 - 502
    Cited by:  Papers (14)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (431 KB)

    A hardware architecture for an adaptive lossless data compressor is described. The architecture is suitable for implementation on a single ASIC. The architecture results from an investigation aimed at developing novel compression algorithms that can utilise the fine-grain parallel processing capabilities of VLSI integrable structures and hence, achieve high performance. The efficiency of different... View full abstract»

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  • Class of undetectable stuck-open branches in CMOS memory elements

    Publication Year: 1992, Page(s):503 - 506
    Cited by:  Papers (4)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (277 KB)

    The authors consider a class of undetectable stuck-open faults in CMOS circuit branches and show that in basic static latch and flip-flop circuits some branches are of this class. Moreover, undetectable stuck-open faults in transistors reported in recent works pertain to this class. It is shown that, in the case of stuck-open faults in these branches, the static circuit becomes a dynamic one. Beca... View full abstract»

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  • Resistively variable capacitors using general impedance convertors

    Publication Year: 1992, Page(s):507 - 516
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (723 KB)

    The use of general impedance convertors (GICs) for the realisation of resistively variable capacitors (RVCs) is demonstrated. Such elements are useful in analogue-adaptive circuits and for neural networks. Various design concepts have been examined with the aim of finding configurations that are suitable for discrete, and complete, or partial VLSI realisation. A number of useful circuit topologies... View full abstract»

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  • Theory and design of LDI lattice digital and switched-capacitor filters

    Publication Year: 1992, Page(s):517 - 526
    Cited by:  Papers (9)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (607 KB)

    The author presents a new method for the exact design and synthesis of lossless discrete-integrator (LDI) lattice digital and switched-capacitor (SC) filters. In the proposed design method, the entire digital and SC filter synthesis is performed directly in the discrete-time z-domain without any recourse to the concept of a continuous-time analogue prototype reference filter. Two LDI lattice digit... View full abstract»

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