IEEE Design & Test of Computers

Issue 1 • Feb. 1987

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  • IEEE Design & Test of Computers

    Publication Year: 1987, Page(s): c1
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  • We Want You for the ISDN Revolution [advertisement]

    Publication Year: 1987, Page(s): c2
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  • A conference preview - 1987 Design Automation Conference

    Publication Year: 1987, Page(s): 1
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  • The Computer Society of the IEEE

    Publication Year: 1987, Page(s): 2
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  • Editorial Board

    Publication Year: 1987, Page(s): 3
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  • Editorial board

    Publication Year: 1987, Page(s): 4
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  • D&T Letters

    Publication Year: 1987, Page(s): 5
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  • D&T Forum

    Publication Year: 1987, Page(s):6 - 7
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  • D&T Scene

    Publication Year: 1987, Page(s):8 - 9
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  • Design Automation

    Publication Year: 1987, Page(s):10 - 11
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  • Design Version Management

    Publication Year: 1987, Page(s):12 - 22
    Cited by:  Papers (27)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (10188 KB)

    Systems for version management have been in existence for some time, yet no system provides the complete range of services needed to control the versions and configurations of a complex design as it evolves over time. The authors have been developing a system, called a version server, to provide just these services. It supports an object -oriented model for organizing design data and provides oper... View full abstract»

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  • Call for Papers

    Publication Year: 1987, Page(s): 23
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  • Efficient Spare Allocation for Reconfigurable Arrays

    Publication Year: 1987, Page(s):24 - 31
    Cited by:  Papers (212)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (8022 KB)

    Yield degradation from physical failures in large memories and processor arrays is of significant concern to semiconductor manufacturers. One method of increasing the yield for iterated arrays of memory cells or processing elements is to incorporate spare rows and columns in the die or wafer. These spare rows and columns can then be programmed into the array. The authors discuss the use of CAD app... View full abstract»

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  • Flute an Expert Floor Planner for Full-Custom VLSI Design

    Publication Year: 1987, Page(s):32 - 41
    Cited by:  Papers (17)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (7584 KB)

    Flute is a heuristic floorplanner that operates as part of Cadre, a system of cooperating expert agents for converting a hierarchical structural description into full-custom VLSI layout. Flute is modeled on the human floorplanning process and uses a mixture of rule-based programming, state control, and algorithmic operators. Initially, a topological plan is generated by placing modules on a grid g... View full abstract»

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  • Built-In Self-Testing RAM: A Practical Alternative

    Publication Year: 1987, Page(s):42 - 51
    Cited by:  Papers (43)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (9027 KB)

    The article investigates the design of a built-in self-testing RAM as an economical way, in terms of silicon area overhead, to test memories-more economical than the use of external testers. The design of a BIST static RAM is given, along with design decisions, retrospectives on how design could have used the area even more efficiently, and results of implementation. The extra silicon area used by... View full abstract»

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  • Hey You! [advertisement]

    Publication Year: 1987, Page(s): 51
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  • Scan Design Using Standard Flip-Flops

    Publication Year: 1987, Page(s):52 - 54
    Cited by:  Papers (40)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1652 KB)

    Classical scan designs require properly augmented flip-flops, often called scan flip-flops. Problems stem from the high area overhead implied by the need for these flip-flops or the inability to modify standard flip-flops. The authors outline a method to design easily testable sequential circuits that achieve scan designs using standard (unmodified) flip-flops. View full abstract»

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  • D&T Roundtable

    Publication Year: 1987, Page(s):55 - 59
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  • D&T Conferences

    Publication Year: 1987, Page(s):60 - 62
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  • Tutorial - Integrated Services Digital Networks (ISDN) [advertisement]

    Publication Year: 1987, Page(s): 62
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  • New Products Design

    Publication Year: 1987, Page(s):63 - 65
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  • New Products Test

    Publication Year: 1987, Page(s):66 - 67
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  • Design Automation Technical Committee Newsletter

    Publication Year: 1987, Page(s):68 - 69
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  • Call for Papers

    Publication Year: 1987, Page(s): 70
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  • Book Reviews

    Publication Year: 1987, Page(s): 71
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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty