IEEE Design & Test of Computers

Issue 3 • June 1986

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  • IEEE Design & Test of Computers

    Publication Year: 1986, Page(s): c1
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  • Now, Your Computer And Communications Network Analysis Simplified [advertisement]

    Publication Year: 1986, Page(s): c2
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  • Design & Test Call for Papers

    Publication Year: 1986, Page(s): 1
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  • The speed of a device tester the power of a board tester [advertisement]

    Publication Year: 1986, Page(s):2 - 3
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  • IEEE Computer Society

    Publication Year: 1986, Page(s): 4
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  • Editorial Board

    Publication Year: 1986, Page(s): 5
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  • Las Vegas to Host 23rd ACM/IEEE Design Automation Conference

    Publication Year: 1986, Page(s):6 - 13
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  • D&T Scene

    Publication Year: 1986, Page(s): 14
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  • From the Editor-in-Chief

    Publication Year: 1986, Page(s): 15
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  • Workstations: A Closer Look

    Publication Year: 1986, Page(s):16 - 17
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  • IC Design Capability Conversion from Mainframe to Workstation Environment

    Publication Year: 1986, Page(s):18 - 24
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (8005 KB)

    Over the last eighteen months, Sandia National Laboratories has converted its IC design facility from a mainframe to a workstation environment. Although workstations were advertised as turnkey systems, augmentation of vendor software with Sandia-developed software greatly enhanced Sandia's specific IC design capabilities. This article examines advantages of the workstation approach for sophisticat... View full abstract»

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  • Proceedings - 1st International Conference on Computer Workstations [advertisement]

    Publication Year: 1986, Page(s): 24
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  • Benchmarking Engineering Workstations

    Publication Year: 1986, Page(s):25 - 30
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (2412 KB)

    As workstations become more popular, it is increasingly important to be able to measure and compare their relative performance. However, benchmarks are often either too specific to be of general interest or too general to be relevant to a specific application. We have constructed a collection of benchmarks-for a common kind of engineering workstation-that give a good approximation of processor, gr... View full abstract»

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  • Proceedings - IEEE International Conference on Computer Aided Design (ICCAD-85) [advertisement]

    Publication Year: 1986, Page(s): 30
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  • A Supercomputer Workstation for VLSI CAD

    Publication Year: 1986, Page(s):31 - 37
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (2808 KB)

    This article describes a VLSI CAD workstation with a massively parallel computer the connection machine, as hardware accelerator. The connection machine offers workstation users general-purpose acceleration capabilities and high interactivity. Workstation software includes a novel CAD-system kernel and tools operating on the connection machine. The system kernel, designed to permit efficient inter... View full abstract»

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  • Watch Technology Happen... in IEEE Computer Graphics And Applications [advertisement]

    Publication Year: 1986, Page(s): 37
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  • VEGA: A Visual Modeling Language for Digital Systems

    Publication Year: 1986, Page(s):38 - 45
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (4347 KB)

    Workstations currently offer many opportunities for sophisticated communication between men and machines. VEGA, an object-oriented programming language, supports the creation of a "visualized" hardware model-enabling experiment with and vertification of digital systems in a visual environment using interactive graphics. This article presents an overview of VEGA's motivation and background, a descr... View full abstract»

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  • A Wirelist Compare Program for Verifying VLSI Layouts

    Publication Year: 1986, Page(s):46 - 51
    Cited by:  Papers (6)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (3859 KB)

    We will describe a wirelist compare program that, together with a VLSI node extractor, is used to verify VLSI IC layout connectivity. Engineers at Digital Equipment Corporation have successfully used this tool in a production environment to debug layout errors. The program is based on a graph isomorphism algorithm and provides graphical and textual guides to pinpoint errors. We will examine this a... View full abstract»

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  • A New Periodical from the IEEE Computer Society

    Publication Year: 1986, Page(s): 51
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  • A New Economical Implementation for Scannable Flip-Flops in MOS

    Publication Year: 1986, Page(s):52 - 56
    Cited by:  Papers (5)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (5362 KB)

    A New implementation for scannable flip-flops in MOS is economical for use in systems that use single latch design. The "System Latch-Scannable Flop" (SL-SF) requires two additional transfer gates, two test clocks, and possibly a test mode signal. Hardware pernalties paid in SL-SF can be the least among other implementations with equivalent test functionality. This article discusses SL-SF only in ... View full abstract»

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  • D&T Article Reprints Available

    Publication Year: 1986, Page(s): 56
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  • Sticks Compaction And Assembly

    Publication Year: 1986, Page(s):57 - 63
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  • D&T Standards

    Publication Year: 1986, Page(s): 64
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  • New Products Design

    Publication Year: 1986, Page(s):65 - 67
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  • New Products Test

    Publication Year: 1986, Page(s):68 - 69
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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty