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IEEE Design & Test of Computers

Issue 6 • Date Dec. 1985

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Displaying Results 1 - 25 of 29
  • IEEE Design & Test of Computers

    Publication Year: 1985, Page(s): c1
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  • Choose LASAR Logic Simulation And Win the Board Game

    Publication Year: 1985, Page(s):nil1 - 1
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  • IEEE Computer Society [advertisement]

    Publication Year: 1985, Page(s): 2
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  • Membership Application

    Publication Year: 1985, Page(s): 3
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  • IEEE Computer Society

    Publication Year: 1985, Page(s): 4
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  • Editorial Board

    Publication Year: 1985, Page(s): 5
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  • From the Editor-in-Chief

    Publication Year: 1985, Page(s): 6
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  • D&T Scene

    Publication Year: 1985, Page(s):7 - 10
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  • The Path to Successful Production

    Publication Year: 1985, Page(s):11 - 12
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  • Inductive Fault Analysis of MOS Integrated Circuits

    Publication Year: 1985, Page(s):13 - 26
    Cited by:  Papers (312)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (14335 KB)

    Inductive Fault Analysis (IFA) is a systematic Procedure to predict all the faults that are likely to occur in MOS integrated circuit or subcircuit The three major steps of the IFA procedure are: (1) generation of Physical defects using statistical data from the fabrication process; (2) extraction of circuit-level faults caused by these defects; and (3) classification of faults types and ranking o... View full abstract»

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  • PROD: A VLSI Fault Diagnosis System

    Publication Year: 1985, Page(s):27 - 35
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (8544 KB)

    Faults in the manufacturing of VLSI chips lower the effective yield, thus increasing manufacturing cost. Early diagnosis of faults can avoid this sitution. Such diagnoses can be made by PROD, a diagnostic expert system that analyzes the joint probability density function of measured IC parameters density fuction of measured IC parameters to determine the source of faults resulting in faults chips.... View full abstract»

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  • Noise Problems in Testing VLSI Hardware

    Publication Year: 1985, Page(s):36 - 43
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (6798 KB)

    Noise resulting from the switching of high-current, off-product drivers in VLSI circuits cause substantial problems during manufacturing test and may lead to zero yield. These problems, seldom addressed during product design, can be mitigated or eliminated either during the design phase or at mauufacturing test. In this article, we present some of our experiences with noise during manufacturing te... View full abstract»

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  • IEEE Design & Test of Computers

    Publication Year: 1985, Page(s): 43
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  • Autoprobing on the L200 Functional Tester

    Publication Year: 1985, Page(s):44 - 49
    Cited by:  Papers (3)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5985 KB)

    The X-Y autoprobing process was developed to eliminate the need to manually probe prototype modules, and to diagnose production modules. The goal of the X-Y autoprobing process is to increase the throughput of the L200 functional tester by decreasing the average diagnostic time, through automatic control of the probe's movement and positioning. The X-Y autoprobing systems installed have demonstrat... View full abstract»

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  • IEEE-488 [advertisement]

    Publication Year: 1985, Page(s): 49
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  • Operational Life Testing of Electronic Components

    Publication Year: 1985, Page(s):50 - 56
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5979 KB)

    The infant mortality rates for ICs and other components have been a major concern throughout the electronics industry. Operational Life Testing was developed by AT&T to continuously monitor the early-life failure levels of various electonic component product families at the manufacturing plant. Rapid failure-mode analysis of OLT defects and implementation of the indicated process, testing, and des... View full abstract»

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  • Teradyne's J967 VLSI Test System: Getting VLSI to the Market on Time

    Publication Year: 1985, Page(s):57 - 62
    Cited by:  Papers (1)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (6395 KB)

    The J967 is the newest of Teradyne's J900 series of VLSI test systems. It provides flxible timing and formating; fact accurate parametric tests; and automatic calibration to devices with fewer than 200 leads and bus speeds of up to 20 MHz. The 36 timing generators and 1024 timing sets reduce the need for multiple passes or multiple programs to test a device. The J967's intergrated software include... View full abstract»

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  • A New Periodical from the IEEE Computer Society

    Publication Year: 1985, Page(s): 62
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  • Gate-Level Simulation

    Publication Year: 1985, Page(s):63 - 71
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  • D&T Conferences

    Publication Year: 1985, Page(s):72 - 76
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  • 1984 Academic Forum for Test Technology October 19, 1984

    Publication Year: 1985, Page(s): 76
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  • D&T Reviewers

    Publication Year: 1985, Page(s):77 - 78
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  • Calendar

    Publication Year: 1985, Page(s):79 - 81
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  • Call for Papers

    Publication Year: 1985, Page(s): 81
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  • IEEE Design&Test Computers

    Publication Year: 1985, Page(s):82 - 87
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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty