IEEE Design & Test of Computers

Issue 5 • Oct. 1985

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  • IEEE Design & Test of Computers

    Publication Year: 1985, Page(s): c1
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  • The Future of Test [advertisement]

    Publication Year: 1985, Page(s): c2
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  • IEEE Design & Test of Computers

    Publication Year: 1985, Page(s): 1
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  • Choose LASAR Logic Simulation And Win the Board Game

    Publication Year: 1985, Page(s):2 - 3
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  • IEEE Computer Society

    Publication Year: 1985
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  • Editorial Board

    Publication Year: 1985, Page(s): 5
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  • Advertisement: Zycad

    Publication Year: 1985, Page(s):6 - 7
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  • Defining Design And Test

    Publication Year: 1985, Page(s): 8
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  • D&T Scence

    Publication Year: 1985, Page(s):9 - 14
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  • Design And Test in Japan Akihiko Yamada, NEC Corporation

    Publication Year: 1985, Page(s):15 - 16
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  • An Integrated Design Automation System for VLSI Circuits

    Publication Year: 1985, Page(s):17 - 26
    Cited by:  Papers (9)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (11940 KB)

    Our Integrated Design Automation System consists of an integrated design database, automated design processors, verification tools, and an interactive capture system. The automatic logic synthesis program, Angel, and the hierarchical layout system Champ/Alpha, have been particularly important in reducing the total design effort. A unified design language, HSL-FX, has been developed to broaden LSI ... View full abstract»

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  • A Knowledge-Based Logic Design System

    Publication Year: 1985, Page(s):27 - 34
    Cited by:  Papers (8)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (9296 KB)

    Our computer-aided logic design system employs a synthesizer, a typical knowledgebased system. The register-transfer-level design is described in digital system design language (DDL). The DDL translator generates a technology-independent functional design from the DDL description, and the syntehsizer transforms the functional design into a technology-dependent gate-level design. We implemented the... View full abstract»

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  • LORES-2: A Logic Reorganization System

    Publication Year: 1985, Page(s):35 - 42
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (7510 KB)

    LORES-2 is a logic reorganization system which greatly contributes to the effective automation of logic design. LORES-2 uses a macro-expansion technique to help designers transform printed-circuit assembly logic composed of SSI and MSI circuits into master-slice LSI logic circuits. The number of gates of the most reorganized LSI circuit falls within ± 20 percent of the number of gates of the orig... View full abstract»

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  • IEEE Design & Test of Computers

    Publication Year: 1985, Page(s): 42
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  • Research in Design Automation for VLSI Layout

    Publication Year: 1985, Page(s):43 - 53
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (13433 KB)

    Since Japanese R&D efforts began in the late 1960s, advances in LSI circuit design automation have made possible the design of custom logic VLSI circuits with up to 10,000 gates. Automatic placement and routing programs have become essential DA tools in both master-slice LSI circuit design, and the custom design of VLSI circuits with up to 100,000 gates. Algorithms for VLSI DA systems include auto... View full abstract»

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  • An Automatic Test-Generation System for Large Digital Circuits

    Publication Year: 1985, Page(s):54 - 60
    Cited by:  Papers (8)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (6874 KB)

    A new test-generation system (FUTURE) for large digital circuits (more than 10K gates) is based on a nine-valued FAN algorithm. Fault simulation adopts a concurrent simulation adopts a concurrent simulation technique. The system consists of four major modules: fault modeling, random pattern generation, algorithmic pattern generation, and fault simulation. The system can be a powerful CAD tool and ... View full abstract»

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  • Proceedings: 1984 International Conference on Computer Design, October 1984 [advertisement]

    Publication Year: 1985, Page(s): 60
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  • HAL: A High-Speed Logic Simulation Machine

    Publication Year: 1985, Page(s):61 - 73
    Cited by:  Papers (14)  |  Patents (28)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (14418 KB)

    The architecture of a very-high-speed logic simulation machine (HAL), which can simulate up to one-half million gates and 2M-byte memory chips at a 5 ms clock speed, is described. This machine makes it possible to debug the total system-CPU, main memory, cache memory and control storage-before the actual machine is fabricated. HAL employs parallel and pipeline processing, and event-driven, block-l... View full abstract»

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  • A Fully-Automated Electron Beam Test System for VLSI Circuits

    Publication Year: 1985, Page(s):74 - 82
    Cited by:  Papers (11)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (10418 KB)

    A fully automated, stroboscopic electrobeam test system that analyzes the behavior of logic VLSI circuits, this system consists of a stroboscopic electron-beam tester combined with an LSI CAD system. LSI circuit design data, read from the CAD system, provides a designed map. The host computer performs interconnection pattern recognition by superimposing this map onto an observed stroboscopic SEM i... View full abstract»

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  • Milestones of New-Generation ATE

    Publication Year: 1985, Page(s):83 - 89
    Cited by:  Papers (1)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (8441 KB)

    Work began in 1976 to produce an accurate, high-speed, multipin tester in the 100-MHz range. Takeda Riken shipped the first such device, the 100 MHz, 384-pin, split I/O Advantest T3380, in early 1979. Although it offered speed and accuracy, the T3380 series was expensive, and it was later determined that the 40-MHz range was more practical and cost-effective for general use. This article describes... View full abstract»

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  • Free Catalog! Your 80-page Guide to Computer Supplies And Accessories-Including Complete New Product Descriptions

    Publication Year: 1985, Page(s): 89
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  • D&T Interview

    Publication Year: 1985, Page(s):90 - 97
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  • IEEE International Conference on Computer Design: VLSI in Computers

    Publication Year: 1985, Page(s):98 - 99
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  • D&T Roundtable

    Publication Year: 1985, Page(s):100 - 105
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  • IEEE International Conference on Computer Design: VLSI in Computers & Processors

    Publication Year: 1985, Page(s): 106
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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

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Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty