IEEE Transactions on Electronic Computers

Issue 2 • April 1967

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Displaying Results 1 - 25 of 44
  • [Front cover]

    Publication Year: 1967, Page(s): c1
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    Freely Available from IEEE
  • IEEE Computer Group

    Publication Year: 1967, Page(s): nil1
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    Freely Available from IEEE
  • Breaker Page

    Publication Year: 1967, Page(s): nil1
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    Freely Available from IEEE
  • Oscillographic Examination of the Operation of Function Generators

    Publication Year: 1967, Page(s):133 - 139
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4007 KB)

    The possibilities of an oscilloscopic examination of the operation of function generators with two or more input variables are discussed. The principles of axonometric oscillography are reviewed and supplemented by a circuit for revolving and inclining the oscilloscopic displays. These results are illustrated by means of examples of generators of the most common functions with two independent vari... View full abstract»

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  • Correlation Method for Computing Sensitivity Functions on a High-Speed Iterative Analog Computer

    Publication Year: 1967, Page(s):140 - 146
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1694 KB)

    During successive high-speed iterative-analog-computer runs, the parameters a1, a2, . . ., am of a simulated dynamical system are perturbed by mutually orthogonal binary sequences of perturbations Δai = ±Δa. Each parameter perturbation remains constant during a full 1-ms analog-computer run. Simple correlation of the perturbed soluti... View full abstract»

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  • Synthesis of UP-DOWN Counters

    Publication Year: 1967, Page(s):146 - 151
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (872 KB)

    IN this paper we will describe an algorithm for the decomposition of UP-DOWN counters. The constituents of the decomposed counters will be UP-DOWN counters of small modulus and small amounts of combinatorial logic. The main advantage accruing from this decomposition technique is that only a small number of building blocks is required to build counters with any modulus. We will begin the discussion... View full abstract»

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  • A Comparison of Linear Sequential Circuits and Arithmetic Sequences

    Publication Year: 1967, Page(s):151 - 157
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1171 KB)

    This paper compares the properties of infinitely recurring sequences and terminating sequences generated by arithmetic division with the properties of linear feedback shift registers. The concept of state is defined as equivalent to the remainder or residue in a division process. It is shown that such state graphs have forms identical with those of classes of feedback shift registers. Divisors gen... View full abstract»

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  • Addition and Subtraction in the Residue Number System

    Publication Year: 1967, Page(s):157 - 164
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1431 KB)

    Improved residue expression and new arithmetic algorithms for addition and subtraction are proposed. In the proposed system positive and negative integers of any magnitude can be handled regardless of the particular choice of the set of relatively prime bases. And such problems as difficulties in overflow detection, handling of sign change in subtraction, or complementation of negative numbers do ... View full abstract»

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  • A Parallel Accumulator for a General-Purpose Computer

    Publication Year: 1967, Page(s):165 - 171
    Cited by:  Papers (4)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (844 KB)

    A family of parallel synchronous comparitors and adders are described which can be constructed entirely of either NOR or NAND circuits. An adder is shown combined with registers to form a high speed but inexpensive 20-bit accumulator. The standard accumulator functions of ADD, UNITE, EXTRACT, LEFT SHIFT, and RIGHT SHIFT are obtained at the cost of 7.5 gates per bit and 12 gate delays for stable su... View full abstract»

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  • An Experimental Word Decode and Drive System for a Magnetic Film Memory with 20-ns READ-Cycle Time

    Publication Year: 1967, Page(s):172 - 179
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2526 KB)

    Design principles of a word selection and drive scheme for a 20-ns nondestructive-READ-cycle-time flat-film memory with 150 000 bits storage capacity, are presented and verified by cross-sectional tests. The word lines are matched at one end and driven from the other by a high-speed driver building block compatible with integrated circuit technology which is connected to a decode matrix. Suitable ... View full abstract»

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  • Digital Real-Time Spectral Analysis

    Publication Year: 1967, Page(s):180 - 185
    Cited by:  Papers (25)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1080 KB)

    The fast Fourier transform algorithm, reported by Cooley and Tukey, results in substantial computational savings and permits a considerable amount of parallel computation. By making use of these features, estimates of the spectral components of a time function can be calculated by a special-purpose digital machine while the function is being sampled. In this paper, two digital machine organization... View full abstract»

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  • Characteristics of Microstrip Transmission Lines

    Publication Year: 1967, Page(s):185 - 193
    Cited by:  Papers (53)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2176 KB)

    Equations are developed which accurately describe the characteristic impedance and signal propagation delay for narrow microstrip transmission lines. Differences in signal propagation delay for microstrip, strip line, and coaxial cables are compared as a function of dielectric constant. The characteristic impedance equation is verified through comparison with experimental results for impedance val... View full abstract»

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  • Multiple Reflections on Pulse Signal Transmission Lines-Model for Computer Solution

    Publication Year: 1967, Page(s):193 - 202
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1526 KB)

    A mathematical model for multiple reflections on lossless, distortionless signal transmission lines is developed for step changes in voltage or current at the source. The model is quite general and is valid for a source driving either one or two lines each loaded with an arbitrary number of discontinuities at arbitrary distances. It will give an exact solution for discontinuities and terminations ... View full abstract»

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  • PHASEPLOT: An On-Line Graphical Display Technique

    Publication Year: 1967, Page(s):203 - 209
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1849 KB)

    A parametric display technique for on-line graphical output is presented. This technique is particularly useful for rapid display of continuous ``smooth'' data, through relatively few computer commands. Graphical data to be displayed are composed from primitive segments, each of which corresponds to one computer command that specifies starting and stopping point, final slope, and ``curvature.'' Pr... View full abstract»

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  • Dynamic Errors in Electronic Analog Computers

    Publication Year: 1967, Page(s):210 - 212
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (608 KB)

    The introduction of dynamic errors in the solutions of linear differential equations by electronic analog computers has been given considerable attention. The previous work on the subject is reviewed herein and a useful application of these results is illustrated. The presentation of the error data is given in terms of the shift in the characteristic roots of the equation caused by the limited ban... View full abstract»

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  • Minimization and Convexity in Threshold Logic

    Publication Year: 1967, Page(s):212 - 215
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (815 KB)

    The problem of deciding whether or not an arbitrary N-variable switching function is realizable with a single-threshold-element device is known to be convertible to the global minimization of a functional derivable from the given switching function. This functional is shown to consist of a structure of intersecting hyper-planes each of which is related to some threshold function. It is further sho... View full abstract»

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  • A Tabular Method for the Synthesis of Multithreshold Threshold Elements

    Publication Year: 1967, Page(s):216 - 220
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1151 KB)

    This paper presents a tabular method for synthesizing Boolean functions having four or less variables with multithreshold threshold elements. The method is similar to that used for conventional single-threshold threshold elements. All 224 functions of four variables are divided into 221 equivalence classes by variable complementations and/or permutations and/or function compl... View full abstract»

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  • On the Number of Distinct State Assignments for Synchronous Sequential Machines

    Publication Year: 1967, Page(s):220 - 221
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (462 KB)

    In an early paper [1], McCluskey and Unger counted the number of distinct state assignments for synchronous sequential machines. Their formula, however, does not account for all distinct state assignments when the memory function in a realization is performed by delay elements alone. This note amends their formula by establishing the conditions for its validity and by deriving the appropriate expr... View full abstract»

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  • Comment on "A method for the selection of prime implicants''

    Publication Year: 1967, Page(s):221 - 222
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (402 KB)

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  • A Note on the Basic Block Diagrams of Finite Automata from the Engineering Point of View

    Publication Year: 1967, Page(s):223 - 224
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (337 KB)

    The use of a parallel multiplier for performing high-speed binary division requires that an algorithm be devised that obtains the quotient by means of multiplications and additions. Furthermore, its hardware implementation must be as simple and as fast as possible. A suitable algorithm, which applies to a first approximation to the reciprocal of the divisor, has already been proposed[1]. A similar... View full abstract»

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  • A Division Method Using a Parallel Multiplier

    Publication Year: 1967, Page(s):224 - 226
    Cited by:  Papers (33)  |  Patents (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (539 KB)

    The use of a parallel multiplier for performing high-speed binary division requires that an algorithm be devised that obtains the quotient by means of multiplications and additions. Furthermore, its hardware implementation must be as simple and as fast as possible. A suitable algorithm, which applies to a first approximation to the reciprocal of the divisor, has already been proposed[1]. A similar... View full abstract»

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  • Array Networks for a Parallel Adder and Its Control

    Publication Year: 1967, Page(s):226 - 229
    Cited by:  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (659 KB)

    A collection of array-like networks of two-input AND gates is described with particular reference to their use in a parallel adder. These networks have properties which facilitate their incorporation in high-capability monolithic circuits. This leads to the adoption of a radix R and a one-in-R binary code. A decimal system is discussed and compared with a pure binary one. The application of the ar... View full abstract»

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  • A Note on the Accuracy of Digital Differential Analyzers

    Publication Year: 1967, Page(s): 230
    Cited by:  Papers (2)
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  • Comment on "A pattern recognition experiment with near-optimum results''

    Publication Year: 1967, Page(s): 231
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  • Authors' reply

    Publication Year: 1967, Page(s): 231
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Aims & Scope

This Transactions ceased publication in 1967. The current retitled publication is 

IEEE Transactions on Computers.

Full Aims & Scope