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IEEE Transactions on Electronic Computers

Issue 4 • Date Aug. 1966

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Displaying Results 1 - 25 of 62
  • [Front cover]

    Publication Year: 1966, Page(s): c1
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    Freely Available from IEEE
  • IEEE Computer Group

    Publication Year: 1966, Page(s): nil1
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    Freely Available from IEEE
  • [Breaker page]

    Publication Year: 1966, Page(s): nil1
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    Freely Available from IEEE
  • IEEE Proceedings Computer Issue

    Publication Year: 1966, Page(s): 419
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    Freely Available from IEEE
  • The Special Issue on High-Speed Memories

    Publication Year: 1966, Page(s):420 - 422
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1133 KB)

    The design and performance characteristics of a 128×64 MOS transistor memory is given. The storage cell used operates with a low standby power, 0.1 mW. The memory operates with a 12-ns access time, 35-ns read cycle time, and a 60-ns write cycle time. View full abstract»

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  • An Investigation of the Potential of MOS Transistor Memories

    Publication Year: 1966, Page(s):423 - 427
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1446 KB)

    The design and performance characteristics of a 128X64 MOS transistor memory is given. The storage cell used operates with a low standby power, 0.1 mW. The memory operates with a 12-ns access time, 35-ns read cycle time, and a 60-ns write cycle time. View full abstract»

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  • An Experimental Nondestructive Microwave Ferrite Core Readout Using Stripline

    Publication Year: 1966, Page(s):428 - 435
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2131 KB)

    A static ferrite storage readout technique is described which utilizes microwave transmission phenomena rather than voltage induction to achieve readout. Reversible, rotational impulse switching is used to effect nondestructive interrogation of a small toroidal core which is coupled to a strip-type ``sense line.'' The core coupled to the stripline causes an electrically controllable discontinuity ... View full abstract»

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  • Fast Nondestructive Read, Slow Write Memory Device Using Thick Magnetic Films

    Publication Year: 1966, Page(s):435 - 441
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1331 KB)

    A device is proposed for providing an ultra high speed read, but comparatively slow write, memory device. The device has certain similarities to other proposed devices, but the mode of operation and performance is quite new and makes use of effects which are normally avoided or minimized in usual memory devices. The storage element is a thick-film bias magnet with a coercive force smaller than its... View full abstract»

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  • Woven Wire Memory for NDRO System

    Publication Year: 1966, Page(s):442 - 451
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3896 KB)

    A 4096 word NDRO memory system using the high speed woven wire memory is discussed. The operating principle and the NDRO characteristics of the memory together with stack construction, noise problems, circuitry, and experimental results are explained. The memory weave consists of electroplated magnetic thin-film wires for the digit-sense lines and insulated wires for the word lines, which are moun... View full abstract»

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  • Magnetic Film Scratch-Pad Memories

    Publication Year: 1966, Page(s):452 - 458
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1855 KB)

    An economic comparison has been made between fully integrated scratch-pad memories and thin magnetic-film scratch-pad memories on the basis of assumed component costs. On this basis, magnetic film memories are more expensive than fully integrated memories for very small memories, as expected. In terms of the assumptions made, the economic crossover as a function of memory size between the two memo... View full abstract»

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  • A Thin-Film Rod Memory for the NCR 315 RMC Computer

    Publication Year: 1966, Page(s):459 - 467
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3342 KB)

    This paper describes a thin-film Rod memory that is used as the main store in the NCR Rod Memory Computer. The production procedure for the Rod storage element and the fabrication and assembly of the memory stack is outlined. The mode of operation of the memory is discussed. Line characteristics, design criteria, as well as a description of word, sense, digit and timing circuits are also presented... View full abstract»

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  • Propagation of Sense Signals in Large-Scale Magnetic Thin Film Memories

    Publication Year: 1966, Page(s):468 - 474
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (936 KB)

    A dynamic analysis has been made of the behavior of sense signals in large-scale magnetic thin film memories. The timed effects of attenuation, distortion, cross coupling and interconnection are superimposed on the transmitted waveforms. The computed signals can be used as a design guide to determine the length of sense lines, the number of intersecting word lines, the sense amplifier requirements... View full abstract»

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  • 2 1/2 D High Speed Memory SystemsߝPast, Present, and Future

    Publication Year: 1966, Page(s):475 - 485
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4900 KB)

    A ferrite core memory system organization is discussed which offers a significant improvement in performance as well as a lower cost potential in larger memory sizes. Significant differences relative to other memory organizations are presented. The diode decoded drive system is discussed in some detail, presenting a frequency domain approach to memory system resonances. A particular system is desc... View full abstract»

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  • First-and Second-Order Ferrite Memory Core Characteristics and Their Relationship to System Performance

    Publication Year: 1966, Page(s):485 - 501
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4180 KB)

    The characteristics of ferrite memory cores are discussed and it is shown how these characteristics relate to the performance of memories with different organizations. First to be discussed are the different memory organizations (3D, 2¿D, and 2D) in which ferrite cores are used. The sense-digit plane configurations for typical systems are discussed and illustrated. Also discussed and illustrated ... View full abstract»

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  • The ``Braid'' Transformer Memory

    Publication Year: 1966, Page(s):502 - 508
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2391 KB)

    This report describes a read-only digital computer memory which utilizes a loom to ``braid'' information into a wire harness. The memory is called a braid memory and is a variation on the type of transformer memory first described by T. L. Dimond. Such memories are useful when permanence of information is desirable. Braids for the memory described in this report were made at the rate of 2... View full abstract»

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  • Content-Addressable and Associative Memory Systems a Survey

    Publication Year: 1966, Page(s):509 - 521
    Cited by:  Papers (23)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2929 KB)

    This review of content-addressable memory and associative computer systems represents an attempt to consolidate and report nontechnically the direction in which numerous independent research programs have progressed during the last ten years. The paper reflects the views of a myriad of researchers on subjects of organization (configuration concepts), hardware elements, logical operations, speed, c... View full abstract»

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  • A Cutpoint Cellular Associative Memory

    Publication Year: 1966, Page(s):522 - 528
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1096 KB)

    Due to the rapidly growing technological ability to batch fabricate a large number of components on one substrate, it is economical and reliable to implement an associative memory by cellular arrays. Such an associative memory is presented in this paper. The proposed memory is word-organized, and its basic building blocks are cutpoint cells with various indices. All the bit-memories, word-sequenti... View full abstract»

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  • Design Techniques of a Delay-Line Content-Addressed Memory

    Publication Year: 1966, Page(s):529 - 534
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3662 KB)

    This paper describes a word-organized concept for retrieving information by means of word association which can be queried in, at most, one ``access'' time. An example of a 1000-word content-addressed memory (CAM) organization is given. It is shown that for a relatively simple logic organization worst-case word association times of 10 ¿s¿and even faster¿are possible. The memory organization for... View full abstract»

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  • Present and Future State-of-the-Art in Computer Memories

    Publication Year: 1966, Page(s):534 - 550
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3878 KB)

    This paper presents a survey of the present state-of-the-art and anticipated future developments in read/write internal memories and on-line auxiliary memories. Functional uses of storage are discussed and advanced memory technologies are categorized by their applicability to each functional level in the storage hierarchy. Eight types of advanced solid-state memories are discussed briefly. Charact... View full abstract»

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  • Internal State Assignments for Asynchronous Sequential Machines

    Publication Year: 1966, Page(s):551 - 560
    Cited by:  Papers (121)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1931 KB)

    The paper presents three procedures for coding the internal states of asynchronous sequential switching circuits. Resulting codes insure that the circuit will function according to flow table specifications independent of variations in transmission delays within the circuit. The assignment methods produce codes that allow one to maximize the operating speed of the circuit and are applicable to com... View full abstract»

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  • Continuity and Realizability of Sequence Transformations

    Publication Year: 1966, Page(s):560 - 569
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1462 KB)

    In this paper we study some relations between the continuity of sequence transformations and their realizability by logic nets. The main results discussed include: the Curtis-Hedlund-Lyndon theorem which states that, if a sequence transformation is continuous and unitary (commutative with the shift transformation), then it can be realized by a net without feedback, and, the extension of this theor... View full abstract»

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  • Analysis of Iterative NOR Autonomous Sequential Machines

    Publication Year: 1966, Page(s):569 - 577
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1221 KB)

    The autonomous behavior of an array of identical elements is investigated and found to be related closely to the structure of the array. Each element consists of a symmetric Boolean function of the inputs and one unit of delay. The interconnection of the elements is described by a matrix. A function in the element is universal and minimal if there exists an n×n interconnection matrix that will ge... View full abstract»

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  • A Tabular Minimization Procedure for Ternary Switching Functions

    Publication Year: 1966, Page(s):578 - 585
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1349 KB)

    A tabular minimization procedure for ternary switching functions is developed. The theory is analogous to that used in the McCluskey simplification method for Boolean functions. Using the ternary function truth table, the procedure provides a systematic method of applying a limited set of reduction rules in a converging process for obtaining a minimal irredundant form of the function. It is shown ... View full abstract»

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  • On Nonlinear Binary Sequential Circuits and Their Inverses

    Publication Year: 1966, Page(s):586 - 596
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1475 KB)

    This paper discusses single-input, single-output binary sequential circuits composed of adders, multipliers and delay units. The principal results are: 1) Finite feedforward circuits are characterized by a response function (rf) which permits the determination of the output for an arbitrary input. 2) Corresponding to every rf is a transfer function (tf) which is obtained by a multidimensional Z-tr... View full abstract»

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  • Generalized Snake-in-the-Box Codes

    Publication Year: 1966, Page(s):596 - 602
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1250 KB)

    A snake-in-the-box (SIB) code of order k is defined to be an ordered sequence of binary code words in which adjacent words differ in only one bit, and pairs of code words that are k or more apart in the ordered sequence differ in at least k bit positions. In this paper, constructions for SIB codes of arbitrary order are given, as well as upper bounds on the maximum code sequence length for given o... View full abstract»

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Aims & Scope

This Transactions ceased publication in 1967. The current retitled publication is 

IEEE Transactions on Computers.

Full Aims & Scope