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Design & Test of Computers, IEEE

Issue 6 • Date June 2006

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  • Front Cover

    Publication Year: 2006 , Page(s): c1
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  • Table of Contents

    Publication Year: 2006 , Page(s): c2
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  • Handling variations and uncertainties

    Publication Year: 2006 , Page(s): 434
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  • Masthead

    Publication Year: 2006 , Page(s): 435
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  • Guest Editors' Introduction: Process Variation and Stochastic Design and Test

    Publication Year: 2006 , Page(s): 436 - 437
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (63 KB)  

    As silicon manufacturing processes scale to and beyond the 65-nm node, process variations are consuming an increasingly larger portion of design and test budgets. Such variations play a significant part in subthreshold leakage and other important device performance metrics. The rise in inherent systematic and random nonuniformity as we scale our silicon devices to the level of atomic scaling will ... View full abstract»

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  • Testing On-Die Process Variation in Nanometer VLSI

    Publication Year: 2006 , Page(s): 438 - 451
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (172 KB)  

    As device technology progresses toward 45 nm and beyond, the fidelity of process parameter modeling becomes questionable. The authors propose the concept of process variation (PV) testing, which involves applying an innovative fault model and test methodology that uses PV sensing circuitry and frequency domain analysis. Rather than pinpointing the variation of different parameters, the architectur... View full abstract»

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  • Statistical Test Compaction Using Binary Decision Trees

    Publication Year: 2006 , Page(s): 452 - 462
    Cited by:  Papers (19)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (504 KB)  

    Because of the significant cost of explicitly testing an integrated, heterogeneous device for all its specifications, there is a need for a test methodology that minimizes test cost while maintaining product quality and limiting yield loss. The authors are developing a decision-tree-based statistical-learning methodology to compact the complete specification-based test set of an integrated device ... View full abstract»

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  • Call for Papers

    Publication Year: 2006 , Page(s): 463
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  • A DFT Approach for Testing Embedded Systems Using DC Sensors

    Publication Year: 2006 , Page(s): 464 - 475
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (662 KB)  

    Today's consumer electronics must be portable, reliable at various operating environments, and power efficient. Thus, semiconductor manufacturers constantly upgrade their production technologies and incorporate intelligent circuit design techniques. With widespread advances in system integration techniques, manufacturers can bundle multiple functionalities onto a single chip, reducing the end prod... View full abstract»

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  • Using Adaptive Circuits to Mitigate Process Variations in a Microprocessor Design

    Publication Year: 2006 , Page(s): 476 - 483
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    With each successive technology generation, process and environmental variations consume an increasingly large portion of the design envelope. To mitigate the impact of these variations, designs can incorporate adaptive techniques to reduce the impact. At the core of adaptability is the fundamental idea that each piece of silicon is different and will respond differently to stimuli. This poses a s... View full abstract»

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  • ElastIC: An Adaptive Self-Healing Architecture for Unpredictable Silicon

    Publication Year: 2006 , Page(s): 484 - 490
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (470 KB)  

    With continued technology scaling, silicon is becoming increasingly less predictable. Recent years have brought an acceleration of wear-out mechanisms, such as oxide breakdown and NBTI, which occur over a part's lifetime. Manufacturing device failure rates will increase significantly with decreases in device sizes, possibly reaching one in thousands or even hundreds of devices. Process variations ... View full abstract»

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  • Call for Papers

    Publication Year: 2006 , Page(s): 491
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  • An Exciting Time in Engineering

    Publication Year: 2006 , Page(s): 492 - 499
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  • Book Reviews: NoC, NoC ... Who's there?

    Publication Year: 2006 , Page(s): 500 - 501
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  • Design and test on chip for EMC

    Publication Year: 2006 , Page(s): 502 - 503
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  • East-West Design & Test Workshop

    Publication Year: 2006 , Page(s): 504 - 505
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  • CEDA Currents

    Publication Year: 2006 , Page(s): 506
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (55 KB)  

    This newsletter covers news, research, and events related to the IEEE Council on Electronic Design Automation. View full abstract»

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  • TTTC Newsletter

    Publication Year: 2006 , Page(s): 507
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  • DATC Newsletter

    Publication Year: 2006 , Page(s): 508
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  • IEEE Computer Society Information

    Publication Year: 2006 , Page(s): 509
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  • IEEE Design & Test of Computers 2006 Annual Index, Volume 23

    Publication Year: 2006 , Page(s): 510 - 519
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  • Tackling variability and reliability challenges

    Publication Year: 2006 , Page(s): 520
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  • Inside Back Cover

    Publication Year: 2006 , Page(s): c3
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  • Back Cover

    Publication Year: 2006 , Page(s): c4
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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty