Issue 12 • Date Dec. 2006
Filter Results
-
Table of contents
|
PDF (43 KB)
-
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information
|
PDF (39 KB)
-
-
-
-
-
Latency-Guided On-Chip Bus-Network Design
|
PDF (883 KB)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Aims & Scope
Contains articles on methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities.
Meet Our Editors
Editor-in-Chief
Sachin Sapatnekar
University of Minnesota
Dept. of Electrical and Computer Engineering
4-174 Keller Hall, 200 Union Street SE
Minneapolis, MN 55455 55455 USA
sachin@umn.edu


