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Solid-State Circuits, IEEE Journal of

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Solid-State Circuits, IEEE Journal of

Issue 8 • Date Aug 1992

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A new resonant-tunnel diode-based multivalued memory circuit using a MESFET depletion load

A large V_DS data retention test pattern for DRAM's

Digitally adjustable resistors in CMOS for high-performance applications

Synthesis techniques for CMOS folded source-coupled logic circuits

A 1-GHz single-chip quadrature modulator

High-speed low-power ECL circuit with AC-coupled self-biased dynamic current source and active-pull-down emitter-follower stage

An analytical access time model for on-chip cache memories

PLA design for single-clock CMOS

An offset reduction technique for use with CMOS integrated comparators and amplifiers

A small-signal model for the frequency-dependent drain admittance in floating-substrate MOSFET's

Totally self-checking CMOS circuit design for breaks and stuck-on faults

A secondary cache controller design for a high-end microprocessor

Design and implementation of a 3D-LSI image sensing processor

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