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Electron Devices, IEEE Transactions on

Issue 11 • Date Nov. 1988

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Displaying Results 1 - 25 of 45
  • Comments on "A compact physical large-signal model for high-speed bipolar transistors at high current densities-part I: one-dimensional model" (by H.-M. Rein et al., with reply)

    Publication Year: 1988 , Page(s): 1995 - 1997
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (217 KB)  

    The junction space-charge-region capacitances are of primary importance for high-speed VLSI bipolar circuit modeling. It is shown in the above paper that the emitter-base junction capacitance model is compact and is in excellent agreement when compared with other relatively complicated models and methods. However, the base-collector junction capacitance model is questionable in the sense that the base-collector junction capacitance becomes more important, rather than being negligible, as suggested by Stubing and Rein, in the high current region. In reply, Rein et al. show that their model is admissible, and give some remarks on Liou's additional comments. Since the transistor model was developed for high-speed ICs, the numerical examples presented are typical for such circuits. This means, e.g., that the specific resistances and the effective thicknesses of the epitaxial collector are more than about ten times lower than in the example given by Liou.<> View full abstract»

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  • A physical short-channel model for the thin-film SOI MOSFET applicable to device and circuit CAD

    Publication Year: 1988 , Page(s): 1866 - 1875
    Cited by:  Papers (55)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (724 KB)  

    A charge-based large-signal transient model for the enhancement-mode thin-film SOI MOSFET in strong inversion, suitable for circuit simulators such as SPICE, is presented. The model physically accounts for the predominant short-channel effects in MOSFET's (namely threshold-voltage reduction, drain-induced conductivity enhancement, velocity saturation with mobility degradation, and channel-length modulation) as influenced by the unique features of thin SOI devices (i.e. the presence of an additional back gate and the possibility of a floating film body). It includes a description of generation current due to (weak) impact ionization, which can have a far greater influence on SOI (as compared to bulk) MOSFET's due to the associated charging of the floating body. Measurements on devices of varied geometry show good agreement with model predictions. The model is implemented in SPICE2, to be used for circuit and device CAD, and TECAP, for automated parameter extraction View full abstract»

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  • Design methodology and size limitations of submicrometer MOSFETs for DRAM application

    Publication Year: 1988 , Page(s): 1876 - 1884
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (772 KB)  

    A design methodology of submicrometer MOSFETs for a one-transistor DRAM cell is proposed, taking into account physical limiting phenomena such as (1) avalanche breakdown at the drain junction, (2) bulk punchthrough, (3) short-channel effect, and (4) hot-electron effect, and circuit-performance requirements such as (5) leakage current, (6) access delay, (7) noise margin and (8) α-particle-induced soft error. It has been found that a minimum metallurgical channel length is 0.42 μm at a circuit voltage of 2.8 V for a planar cell structure. Although these parameters are derived assuming a planar cell, the presented design method can be applied to advanced cell structures, such as stacked and trench cell structures, by setting adjustable design parameters for the area and capacitor factors of a memory cell View full abstract»

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  • Recent advances in MAGNUS computational technology for three-dimensional nonlinear magnetostatics

    Publication Year: 1988 , Page(s): 2034 - 2038
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (492 KB)  

    Presents recent advances of the computer program MAGNUS. MAGNUS can solve numerically any general problem of nonlinear magnetostatics in three dimensions. The problem is formulated in a domain with boundary conditions of the following types: Dirichlet, Neumann (field confinement), or periodicity. The domain can contain conductors of any shape in space, nonlinear magnetic materials with magnetic properties specified by magnetization tables, and nonlinear permanent magnets with any given demagnetization curve. MAGNUS uses the two-scalar-potentials formulation of magnetostatics and the finite-element method, has an automatic 3D mesh generator, and advanced post-processing features that include graphics on a variety of supported devices, tabulation, and calculation of design quantities required in magnetic engineering. Because of its generality, MAGNUS has found applications in the design of various vacuum electronic devices that include accelerator magnets and spectrometers, steering magnets, wigglers for free-electron lasers, light sources for lithography and microtrons as well as magnets for NMR and medical applications and recording heads. This paper deals with the latest extensions of MAGNUS View full abstract»

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  • Finite-element analysis of magnetotransistor action

    Publication Year: 1988 , Page(s): 1851 - 1860
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (864 KB)  

    Most of the semiconductor device geometries that are being experimented with for improved magnetic field sensing do not lend themselves to accurate analytical modeling. The vectorial interaction taking place between the electrical current and the magnetic field complicates the problem of solving nonlinearly coupled carried density and electrostatic potential equations. In this work, solutions to the carrier density and electrostatic potential distributions are obtained by using a finite-element technique for a structure representing lateral and vertical bipolar transistors with multiple collectors. The results presented show the effect of the magnetic field to be very nonuniformly distributed around the emitter with a heavy-concentration near the emitter edges where the Lorentz-force-driven carriers are stopped at the insulating boundaries and give rise to a magnetoconcentration in the carrier densities. Distribution of currents collected by a multitude of collectors surrounding the emitter and their sensitivity to the magnetic field are given. The vertical magnetosensitivities are found to be an order of magnitude smaller than the lateral magnetosensitivity because of the lack of such a magnetoconcentration of carriers under the emitter. The computer program developed can simulate unipolar as well as bipolar magneto-sensitive devices with any boundary geometry View full abstract»

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  • Mesh boundaries in potential problems

    Publication Year: 1988 , Page(s): 2077 - 2081
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (388 KB)  

    An alternative method of handling the intersection of a regular mesh with an irregular boundary is described. Instead of stopping the mesh at the boundary, one extends it one or two meshes beyond, and assigns to the nodes that are exterior to the actual boundary fictitious potentials, which are images of the interior potentials, in such a manner that the potential gradients are correctly maintained up to the boundaries. Use of this method has led to a ray-tracing program in which the description of the boundary to the computer has been reduced to the simplest possible terms, namely, exactly that information that would be needed to draw the boundary with a ruler, compasses, and protractor View full abstract»

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  • Dynamics of heavy-ion-induced latchup in CMOS structures

    Publication Year: 1988 , Page(s): 1885 - 1891
    Cited by:  Papers (20)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (580 KB)  

    Heavy-ion-particle-induced latchup phenomenon in CMOS parasitic p-n-p-n structures is analyzed using a two-dimensional transient device simulator. In the study, the dynamics of the latchup turn-on behavior in a conventional bulk structure are investigated in detail. Moreover, the relation between the terminal currents and the behavior of inner variables such as carriers and potential is also described. Relative latchup immunity for several device structures is also studied. From the points of the decoupling of the parasitic n-p-n and p-n-p transistors, which is the key factor for preventing latchup, the p--p+ epitaxial wafer with and without guard bands is discussed in comparison with the conventional structure View full abstract»

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  • Parallel computation for electronics design

    Publication Year: 1988 , Page(s): 2039 - 2043
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (476 KB)  

    The use of parallel computational techniques for the design of vacuum electronic devices is presented with applications. The capabilities of parallel machines with an overview of the environment of the Connection Machine at NRL are discussed. An overview of particle-in-cell numerical techniques with application to both one-dimensional and three-dimensional codes is presented View full abstract»

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  • The influence of the drain multiplication current on latchup behavior

    Publication Year: 1988 , Page(s): 1810 - 1819
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (564 KB)  

    A method is described for determining the maximum operating voltage of a NMOS transistor in a CMOS technology before latch-up occurs. The drain multiplication current and the shunting well resistance are very important parameters for simulating the initiation of the parasitic thyristor. Measurement results show the influence of the well resistance and the gate length for transistors processed on bulk wafers and on epi wafers. Good agreement between simulations and experimental results is obtained View full abstract»

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  • A high-performance bipolar/CMOS process-CIT2

    Publication Year: 1988 , Page(s): 1861 - 1865
    Cited by:  Papers (3)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (420 KB)  

    A novel self-aligned bipolar/CMOS process called Collector Implanted Technology 2 (CIT2) with 1.5-μm optical lithography has been developed. LSI chips fabricated in standard bipolar technologies with high-temperature processes, which have buried layer, epitaxy, and isolation diffusions, have a reduced yield compared to MOS circuits and are difficult to combine with CMOS. Therefore a new process with an implanted collector was developed. CIT technology uses neither epitaxy nor a buried layer. It can be produced on a bipolar or MOS production line. n-p-n transistors with a high transition frequency (fT=5 GHz) and ECL gates with a delay time of 180 ps were made. The complete surface of the extrinsic base is covered with platinum silicide, and thus its resistance is reduced to a value of 20 Ω. The performance of the n- and p-channel MOS transistors is comparable to those of a conventional CMOS process. The p-channel MOS transistors is formed in an n-well. The drain and source both p- and n-channel, direct contacted by polysilicide. The minimum propagation delay is 280 ps View full abstract»

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  • The asymptotes of the base current in bipolar devices

    Publication Year: 1988 , Page(s): 1902 - 1908
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (588 KB)  

    Simple analytical equations are derived for the asymptotes of the base current of a bipolar transistor. Three limiting asymptotes are considered, namely, that for a transparent emitter with a high recombination velocity, that for a transparent emitter with a low recombination velocity, and that for an opaque emitter. The asymptote equations are expressed as functions of a measurable fabrication parameter, the emitter-base junction depth. It is shown that the asymptotes can be represented graphically by logarithmic plots of base current density as a function of the emitter-base junction depth, the three asymptotes giving straight lines with gradients of -1, 0, and +1. The asymptote equations are validated by comparison with exact numerical calculations and with experimental data taken from the literature. In this way, it is shown how the asymptote equations can be used to provide valuable insight into the physical mechanisms that control the base currents of different types of bipolar transistor View full abstract»

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  • Simulation of magnetrons and crossed-field amplifiers

    Publication Year: 1988 , Page(s): 2060 - 2067
    Cited by:  Papers (25)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (504 KB)  

    Describes a computer program for simulation of the magnetron oscillator and crossed-field amplifiers. Emphasis is placed on accuracy and efficient computation with moderate numbers of electrons and moderately large time steps. Distinctive features are (1) space-charge field evaluation by Buneman's cycle reduction method and separate treatment of electrons near the cathode; (2) circuit field and electronic induction calculation by use of a Ramo (Green's) function, accounting for space-harmonics; (3) calculation of RF network response by means of Green's functions; (4) predictor/corrector evaluation of average RF signals; and (5) use of fifth-degree power series calculation of electron trajectories. The simulation is illustrated in the starting of oscillations from computer noise View full abstract»

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  • Determining mode excitations of vacuum electronics devices via three-dimensional simulations using the SOS code

    Publication Year: 1988 , Page(s): 2027 - 2033
    Cited by:  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (568 KB)  

    Examined the feasibility of determining via simulation the mode excitation behavior of vacuum electronic devices. The SOS code was used to compute the resonance modes (frequency-domain information) of sample devices and separately to compute the transient behavior of the same devices. Then a new code, DOT, to compute appropriate dot products of the time-domain and frequency-domain results and the transient behavior of individual modes in the device. Modes in a coupled-cavity traveling-wave tube (CCTWT) section excited with coaxial E-probes (cable stubs) and with an electron beam were analyzed in separate simulations. The authors examined whether the transient waves were forward or backward waves for each case. Finally, they computed the hot-test mode frequencies of the CCTWT section View full abstract»

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  • Design considerations for integrated high-frequency p-channel JFETs

    Publication Year: 1988 , Page(s): 1924 - 1934
    Cited by:  Papers (2)  |  Patents (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (724 KB)  

    To achieve high-frequency performance of integrated p-channel JFETs, the large substrate capacitance is decoupled by separating the top gate from the bottom gate. Further optimization of the JFET design, with respect to frequency response, is studied here both theoretically and experimentally using devices produced in a double-implantation BIFET process for analog integrated circuits. Results show that attenuation of the hole mobility due to high doping level effects make it favorable to design with wide lightly doped channels. To avoid undesirable currents from the source to the drain or from the top to the bottom gate, the channel must be uniform. This and the requirements for high-frequency performance put additional demands on the technology. Use of the separated-gate JFET in circuit designs is complicated by the presence of a large bulk effect and the top-gate to bottom-gate reachthrough diode View full abstract»

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  • A new triple-well resonant tunneling diode with controllable double-negative resistance

    Publication Year: 1988 , Page(s): 1951 - 1956
    Cited by:  Papers (3)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (528 KB)  

    A newly structured triple-well resonant tunneling diode (RTD) is proposed as a triple-valued logic device. The superiority of this new RTD for triple-valued logic application is demonstrated with numerical simulation based on the transfer matrix method. This new RTD exhibits significant double-negative differential resistance, and the two current peak voltages are independently controlled with well thicknesses. Comparing the numerical calculation and experimental data, it is shown that agreement between the calculation and experiment on the two current peak voltages is excellent View full abstract»

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  • Waveguide calculations using established codes

    Publication Year: 1988 , Page(s): 2044 - 2047
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (348 KB)  

    Numerical solutions using well-developed and tested finite-difference codes are presented with the goal being to illustrate the power and flexibility of the numerical solvers, especially as compared to analytical methods View full abstract»

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  • Determination of the small-signal parameters of an AlGaAs/GaAs MODFET

    Publication Year: 1988 , Page(s): 1793 - 1801
    Cited by:  Papers (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (700 KB)  

    The small-signal equivalent-circuit parameters of an AlGaAs/GaAs MODFET are derived by a first-order perturbation around the two-region DC model of a FET. For the first time the contribution of the AlGaAs electrons is included by using an accurate charge-control model. The charge-control model uses mixed quantum mechanical and classical approach to determine the density of channel electrons and AlGaAs neutral donors as a function of rate voltage. The model predictions show good agreement with experimental results for both low and high drain bias voltages View full abstract»

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  • As-ion-implantation simulation for trench structures using Monte Carlo method

    Publication Year: 1988 , Page(s): 1820 - 1828
    Cited by:  Papers (2)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (944 KB)  

    This study features As-ion-implantation simulation for three-dimensional trench structures using a newly developed Monte Carlo simulation program. The calculation procedure for the two-body collision process is tabulated to substantially reduce the CPU time. The simulation offers optimized ion-implantation methods and structures for cone-shaped trench capacitors, a promising candidate for megabit DRAM capacitors. Since the incident ions are injected with a shallow angle to the sidewall surface, some of the incident ions have been found to be recoiled from the surface and reinjected into another surface or the bottom. The simulation has revealed the optimized incidence angle for general trench structures, the effect of the trench depth/width ratio on the dose distribution, and the dose distribution improvement by adding a moderate taper angle for the trench sidewall, from the uniform doping viewpoint. Based on these results, trench ion implantation was proved to be capable of achieving nearly uniform doping profiles within deviations of a factor of 2 or 3 View full abstract»

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  • Field-dependent electron mobility in silicon between 8 and 77 K-a semi-empirical model

    Publication Year: 1988 , Page(s): 1972 - 1976
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (324 KB)  

    The development of a semi-empirical model that predicts the electron mobility in silicon as a function of the electric field in the ⟨100⟩ direction, the doping density, and the temperature for the temperature range 8 to 77 K is discussed. The approach integrates the empirical formulas relating drift velocity and mobility to electric field, developed by Caughey and Thomas, the experimental data obtained by Canali et al., for hyperpure silicon at low temperatures, the theory of scattering rate scaling proposed by Thornber, and the simulation of electron transport via the Monte Carlo method. Figures showing the resulting electron drift velocity under various conditions of doping and temperature are included View full abstract»

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  • A computationally simple model for hysteretic thin-film electroluminescent devices

    Publication Year: 1988 , Page(s): 1834 - 1841
    Cited by:  Papers (9)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (604 KB)  

    A temporal model based on the Howard, Sahni, and Alt model (1982) that describes hysteresis, the transient and the steady-state values of the interface state charge, and the trapped bulk charge in an AC thin-film electroluminescent device is developed. A fast and efficient numerical procedure that calculates the steady-state hysteretic state of a ZnS:Mn thin-film device is developed for the above model. Graphs of device current and luminance that result from the above model are given View full abstract»

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  • Low-temperature polycrystalline silicon thin-film transistors for displays

    Publication Year: 1988 , Page(s): 1842 - 1845
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (412 KB)  

    Polycrystalline silicon thin-film transistors (TFTs) have been fabricated with low-temperature (600°C) oxidized semi-insulating polysilicon (SIPOS) as the gate insulator. Even though no process temperature exceeds 600°C, no threshold drift has been observed. In addition, low threshold voltages and effective mobilities as high as 44 cm2/V·s were measured, and an ON/OFF current ratio >5×105 has been achieved after hydrogen passivation. As a result, these devices are highly suitable for application to flat-panel displays on low-melting-point glass View full abstract»

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  • On the narrow-emitter effect of advanced shallow-profile bipolar transistors

    Publication Year: 1988 , Page(s): 1942 - 1950
    Cited by:  Papers (17)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (812 KB)  

    A methodology is established to assess the physical mechanisms behind both the base current and collector current modifications. It is shown that, in addition to a reduction in the active device area due to the lateral encroachment of extrinsic base into the intrinsic base area, the emitter polysilicon-single-crystal interface (bulk property of the polysilicon emitter) and the emitter/extrinsic-base overlap (perimeter property) also play important roles in determining the current gain for narrow-emitter bipolar transistors. The slopes of the collector saturation current density (Jcs) and the base saturation current density (Jbs) with respect to the perimeter-to-area (P/A) ratio are shown to be useful monitoring parameters for the lateral encroachment and the emitter polysilicon-single-crystal interface. The implications on the device and process design for future scaled-down devices are discussed View full abstract»

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  • A new form of regenerative switching device-the camel switch

    Publication Year: 1988 , Page(s): 1963 - 1971
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (460 KB)  

    A new form of two-state switching device is proposed and analyzed. The new structure is composed of a camel diode and an adjoining p+ -n junction arranged in a back-to-back configuration. With negative voltage applied to the cathode, a regenerative feedback mechanism is established, which is the key to the proper operation of this camel switch. The relationship between the design parameters and the device performance is presented. The effects of the recombination-generation mechanism and the minority carriers are also included View full abstract»

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  • Generation mechanism and elimination of fixed pattern noise in dual-channel horizontal-CCD register image sensor

    Publication Year: 1988 , Page(s): 1846 - 1850
    Cited by:  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (552 KB)  

    A dual-channel horizontal-CCD (H-CCD) register scheme is essential to realizing high-density image sensors. However, fixed pattern noise will appear, unless precise care is taken in designing a transfer region connecting two H-CCD registers. This paper indicates that the fixed pattern noise is caused by an incomplete signal charge transfer between two H-CCD registers, due to the potential dip and barrier formed in the transfer region. A new transfer-region structure is proposed. It has been confirmed that the fixed pattern noise can be eliminated by this new structure View full abstract»

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  • Differential algebraic description and analysis of trajectories in vacuum electronic devices including space-charge effects

    Publication Year: 1988 , Page(s): 2002 - 2009
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (636 KB)  

    A new method is presented to obtain transfer maps describing trajectories in vacuum electronic devices to arbitrary order. The method is based on differential algebraic techniques and is well suited for a combination with many field-generating codes. Also, internal space-charge fields in two or three dimensions can be treated in a straightforward manner based on the method of regular Gaussian subbeams. Contrary to the very unstable numerical differentiation techniques, all nonlinearities of the transfer map describing the trajectories will be obtained to an accuracy limited only by the discretization error of the field computation program View full abstract»

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IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

 

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Acting Editor-in-Chief

Dr. Paul K.-L. Yu

Dept. ECE
University of California San Diego