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Circuits, Devices and Systems, IEE Proceedings G

Issue 3 • Date Jun 1992

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Displaying Results 1 - 21 of 21
  • Fault diagnosis in large analogue circuits based on hybrid decomposition

    Publication Year: 1992 , Page(s): 311 - 318
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (536 KB)  

    Fault location in analogue circuits is treated using a hybrid decomposition technique. The method is based on linear fault diagnosis (FD) equations and node-voltage measurements under the desired current excitations. The circuit is divided into subcircuits using a combination of node and branch decomposition techniques. The consistency of the FD equations using nominal element values and the measured node voltages is checked to locate the faulty subcircuits. Built-in self-test in analogue circuits may also be implemented based on the proposed method and following the given practical tolerance considerations, which overcome the need for a pre-test circuit analysis. Demonstrative examples are given to show the effectiveness of the proposed technique View full abstract»

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  • Performance prediction and function recovery of CMOS circuits damaged by Co-60 irradiation

    Publication Year: 1992 , Page(s): 319 - 324
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (316 KB)  

    A performance prediction of total-dose radiation effects on CMOS ICs is described. A good agreement between the simulated and the experimental results is obtained. The function recovery of the postirradiation CMOS ICs can be achieved by increasing the power supply voltage and input signal amplitude, or by an annealing treatment at 350°C in Ar ambient for ten minutes View full abstract»

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  • Sigma-delta modulators with multibit quantising elements and single-bit feedback

    Publication Year: 1992 , Page(s): 356 - 362
    Cited by:  Papers (4)  |  Patents (6)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (424 KB)  

    The performance of multibit sigma-delta coders is analysed and compared with that available from single-bit designs. It is demonstrated that the basic difficulty with multibit coders is the need for a high-accuracy digital-analogue convertor (DAC) in the feedback loop. An expression for the reduction of in-band noise power as a function of coder order, quantiser resolution, and oversampling ratio is derived, together with a subsidiary condition imposed by the use of multibit DACs. New coder topologies are presented which use multibit quantisation with single-bit feedback, avoiding the need for high-resolution DACs. Analysis and simulations are described which show that these have a similar performance to multibit designs with multibit feedback View full abstract»

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  • Optimisation approach to the analysis of piecewise-linear convex circuits

    Publication Year: 1992 , Page(s): 295 - 300
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (340 KB)  

    The author presents an optimisation approach to the investigation of piecewise linear convex circuits. The problem is formulated in terms of the objective function and linear equality constraints applied to the diode circuits. Two efficient techniques for solving such a problem are presented. One is based on the active constraints strategy and implemented in the form of a numerical program, and the second one is based on the neural principle and implemented in analogue circuitry, solving the problem in real time. Results of numerical experiments illustrate the theoretical considerations View full abstract»

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  • Simple analytical model for short-channel MOS devices

    Publication Year: 1992 , Page(s): 405 - 409
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (268 KB)  

    A simple analytical model derived from a quasi-two-dimensional analysis with a non-vanishing E-field derivative at the pinchoff point and a continuous output conductance at the transition point for short-channel MOSFETs is presented. This model also covers mobility reduction, carrier velocity saturation, body, channel-length modulation, source-drain series resistance and short-channel effects for an accurate determination of the pinchoff point location without internal numerical iterations as compared to other models. This model can be used to describe the channel-length modulation effects more accurately in circuit simulation with short-channel MOSFETs View full abstract»

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  • Inversion of continued-fraction expansion of multidimensional transfer functions using derivatives and graphs

    Publication Year: 1992 , Page(s): 395 - 399
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (228 KB)  

    It is shown that the inversion of continued-fraction expansion of transfer functions of multidimensional systems can be carried out by the use of derivatives or equivalently using simple graphs. Only one parameter of the transfer function need be evaluated first. The remaining parameters are obtained as partial derivatives of this parameter. Based on these evaluations, the transfer function is obtained View full abstract»

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  • Conjugate gradient algorithm for efficient training of artificial neural networks

    Publication Year: 1992 , Page(s): 301 - 310
    Cited by:  Papers (12)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (484 KB)  

    A novel approach is presented for the training of multilayer feedforward neural networks, using a conjugate gradient algorithm incorporating an appropriate line search algorithm. The algorithm updates the input weights to each neuron in an efficient parallel way, similar to the one used by the well known backpropagation algorithm. The performance of the algorithm is superior to that of the conventional backpropagation algorithm and is based on strong theoretical reasons supported by the numerical results of three examples View full abstract»

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  • Systolic array architecture implementation of parasitic-insensitive switched-capacitor filters

    Publication Year: 1992 , Page(s): 384 - 394
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (748 KB)  

    A systematic procedure is developed for implementing switched-capacitor filters in systolic array architecture. The most complete signal flow graphs that satisfy the conditions of a systolic array, and also the general first- and second-order transfer functions, are considered. A step-by-step reduction procedure is then developed for the second-order signal flow graphs that yield structures which can be implemented with a minimal amount of hardware in LSI/VLSI technology. Implementation of switched-capacitor filters using these reduced signal flow graphs is discussed. Some structures that are not strictly systolic are also considered for second-order filters. Generation of parasitic-insensitive second-order switched-capacitor filters using systolic array architecture are, however, treated in detail, both for biphase (two-phase) and for four-phase clocking schemes. Guidelines for minimising the total capacitance are given and the sensitivity characteristics are provided. Systolic array architecture realisation of a higher-order switched-capacitor filter is illustrated View full abstract»

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  • Design, selection and implementation of flash erase EEPROM memory cells

    Publication Year: 1992 , Page(s): 370 - 376
    Cited by:  Patents (4)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (456 KB)  

    The author reports an investigation into the design and process constraints of flash EEPROM memory cells. He describes several possible structures which were developed by the MOS memory R&D group of National Semiconductor Corporation at West Jordan, Utah. These structures were implemented and tested on a specially designed test chip. In addition to the typical structures of poly 1 floating gate and poly 2 control gate, new novel structures of poly 2 floating gate and poly 1 control gate were implemented. A total of five major structures are described. The author discusses the principle of operation, advantages and disadvantages of each of these structures. Also included are characteristic results and a discussion of the performance of these candidate cells View full abstract»

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  • Analysis of a Class E rectifier with a series capacitor

    Publication Year: 1992 , Page(s): 269 - 276
    Cited by:  Papers (2)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (348 KB)  

    The analysis, design procedure, and experimental results are presented for a Class E rectifier. The circuit consists of a diode, a series capacitor, and a second-order lowpass filter. The diode ON duty cycle and the ripple voltage are decoupled, i.e. the two parameters are determined by different circuit elements. The diode turns on at low |dv/dt| and turns off at zero dv/dt and low |di/dt|, reducing both switching losses and noise. The circuit has a step-down AC-DC voltage transfer function and therefore is especially suitable for applications in low-output-voltage power supplies. The experimental and calculated results were in good agreement View full abstract»

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  • Simple and direct computer simulation of continuous-mode resonant convertors in steady state

    Publication Year: 1992 , Page(s): 411 - 412
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (72 KB)  

    A.V. Mathew and R. Unnikrishnan (see ibid., vol.136, no.2, p.99-104, 1989) gave a simple model for a continuous current mode series resonant convertor in the steady state. The authors present a simple method for computer simulation of this type of convertor View full abstract»

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  • Software based linearisation of thermistor type nonlinearity

    Publication Year: 1992 , Page(s): 339 - 342
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (224 KB)  

    A simple algorithm-oriented digital technique is described that utilises a truncated power series to linearise thermistor type sensor characteristics. Early truncation of the series, made possible by the adoption of a comparison algorithm, reduces the computation time considerably. The comparison algorithm also reduces the per cent full-scale deviation in nonlinearity to well within an acceptable limit. The software developed has flexibility in the selection of sensor specification and range View full abstract»

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  • Noise characteristics of n-channel deep-depletion mode MOS transistors

    Publication Year: 1992 , Page(s): 377 - 383
    Cited by:  Papers (3)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (508 KB)  

    The potential of deep-depletion MOS transistors for a low-noise, analogue signal-processing application is investigated in this paper. These are predicted to have a favourable noise performance, because a buried depletion layer in this transistor structure can be induced between its conduction channel and the SiO2-Si interface noise mechanisms, which dominate a surface-channel device. Measurements for n-channel depletion-mode MOS transistors formed on p -type ⟨100⟩ orientation silicon substrates are presented. Under certain bias conditions these devices exhibit a significant reduction in the low-frequency noise performance over conventional, surface-channel MOS structures. A BiCMOS cascode buffer circuit is proposed, which yields a favourable noise performance for infrared, focal-plane signal-processing applications View full abstract»

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  • Microwave probe for circuit/device testing

    Publication Year: 1992 , Page(s): 333 - 338
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (424 KB)  

    A probe for the high frequency measurement of discrete semiconductor devices in a naked form is described. Because conventional coplanar based probes cannot measure such devices directly, an artificial package usually needs to be fabricated to enable the device to be probed via the artificial package pads. The new probe avoids this need and overcomes the severe problems normally encountered in de-embedding the packaging effects from the device data. The design of the probe and its RF performance are described with the use of GaAs terminations. The usefulness of the probe in assessing packaging effects in microwave bipolar devices is demonstrated by measuring the S-parameters of a bipolar device in a naked and packaged environment View full abstract»

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  • Radiation hardened high performance CMOS VLSI circuit designs

    Publication Year: 1992 , Page(s): 287 - 294
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (492 KB)  

    For space or nuclear plant applications, radiation tolerant high performance CMOS VLSI circuit designs, utilising scaled CMOS/SOS technology and scaled bulk CMOS technology, have been reviewed, placing strong emphasis on total dose radiation hardness. Based on radiation induced degradations for conventional CMOS circuits, such as inverters, ring oscillators and memory circuits, total dose radiation hardening technologies have been discussed. It is shown that low temperature process and thin oxide introductions are effective for radiation induced threshold voltage shift reduction. In addition to device/process technologies for total dose radiation hardening, usefulness for NAND logics and static circuits in radiation tolerant CMOS VLSI designs, are shown. Latchup immunity and SEU immunity have also been discussed, for both SOS and bulk devices. CMOS/SOS radiation hardened VLSIs and bulk CMOS radiation hardened VLSIs which have been developed by utilising above mentioned technologies, are reported View full abstract»

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  • Designing filters for polyphase filter banks

    Publication Year: 1992 , Page(s): 363 - 369
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (376 KB)  

    The authors are concerned the filter design problem for a recently-proposed polyphase filter bank with an arbitrary number of subband channels. They have developed an analytical formula for the design of a prototype filter used in the polyphase filter bank. Compared with direct numerical design methods, this formula-based method allows the design of the required FIR lowpass prototype filter with a much lower complexity of operation and better filter bank performance. The theoretical results are further extended to two dimensions. Examples are also presented View full abstract»

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  • The effect of substrate resistivity on threshold voltage shifts due to radiation-induced damage in IGFET

    Publication Year: 1992 , Page(s): 400 - 404
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (240 KB)  

    The authors describe the dependence of the radiation-induced threshold voltage shift (ΔVt) of n-channel IGFET devices on the substrate doping concentration and the concentration of segregated boron atoms in the oxide. Substrate resistivities of 0.1 and 0.5 ohm/cm were used. The thicknesses of the investigated gate oxides varied from 17.0 to 50.0 um. The devices were irradiated with Al Kα (1.49 keV) X-rays to different radiation doses at identical dose rates. The threshold voltages were measured before and after irradiation, employing an optically assisted hot electron injection technique. Following irradiation and hot electron injection, the threshold voltage shifts due to fixed positive charge (ΔVFPC) and neutral electron traps (ΔVNET) were determined. The radiation-induced threshold voltage shifts due to FPCs were greater for the 0.5 ohm/cm wafer than for the 0.1 ohm/cm wafer, and the threshold voltage shifts due to NETs were greater for the 0.1 ohm/cm substrate. The interface concentration of boron in the oxide at different depths obtained from Suprem-III simulations was related to induced threshold voltage shifts View full abstract»

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  • Optically driven photoconductive devices for power switching application. 1. Theory and experimental results

    Publication Year: 1992 , Page(s): 343 - 349
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (384 KB)  

    The photoconductive circuit element (PCE) can be made relatively compact, can hold off a large voltage when the light is off and can conduct a large current when the light is on. Thus the PCE is an attractive device for power switching applications. The authors have designed, fabricated and measured several prototype (scaled-down) PCEs to study the feasibility of using such devices for power-switching purposes. Physical insights and theoretical analysis are also discussed. Qualitative agreements are found between experimental data and the results calculated from a recently developed numerical model View full abstract»

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  • Five-parameter DC GaAs MESFET model for nonlinear circuit design

    Publication Year: 1992 , Page(s): 325 - 332
    Cited by:  Papers (2)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (524 KB)  

    An improved gallium arsenide (GaAs) MESFET model for nonlinear large-signal circuit design is described, together with the parameter estimation and optimisation techniques. The new model is based on the work of Curtice (1980) and offers significant advantages in the simulation of the device in the low-current region. This is achieved by modelling the bias dependency of the pinch-off voltage. Data showing the bias dependency of the device model parameters is provided and a comparison between the new model, the Curtice model and the Schichman-Hodges FET model is made, with the use of a wide variety of different size devices. The software modules for the automated characterisation and modelling of GaAs devices are also described View full abstract»

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  • Computer-aided interactive filter design using templates

    Publication Year: 1992 , Page(s): 277 - 286
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (532 KB)  

    Particular properties of symmetric lattices provide a convenient basis for the development of an empirical approach, based on templates, to the design of analog filters. These templates can be used for the design of filters with demanding specifications for attenuation and phase responses, and also for the design of equalisers. The authors present an effective interactive computer tool as part of a computer-aided approach to this problem, and presents significant extensions to the theory to enable the designer to determine the transfer function by specifying the desired attenuation at a number of points. The design leads to reactance functions that define the arms of a symmetric lattice. The transfer function of the filter is also produced, and can be used to give other realisations View full abstract»

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  • Optically driven photoconductive devices for power switching application. II. Thermal modelling including heat sink

    Publication Year: 1992 , Page(s): 350 - 355
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (332 KB)  

    For pt.I see ibid., vol.139, no.3, p.343-9 (1992). The removal of heat generated in power devices using a heat sink is increasingly important for packaging and reliability, particularly for the photoconductive circuit element (PCE) which can conduct a large current when used as a high power switch. The authors present a thermal model for estimating the relationship between the temperature in a p +-i-n+ PCE and the required geometry of the heat sink under steady-state dark and illuminated operations. The model is based on a one-dimensional heat-transfer analysis and relevant semiconductor device physics. Given the bias condition, the geometry and the material for the PCE, and the material for the heat sink, the model can predict the area of the heat sink needed for a desired temperature in the device. Calculations for different semiconductor thicknesses, different metals (aluminum and copper), different semiconductors (Si and GaAs), different applied voltages, different levels of optical excitation and different device operations (turn-on and turn-off operations) are illustrated View full abstract»

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