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Circuits and Systems, IEEE Transactions on

Issue 7 • Date July 1991

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Displaying Results 1 - 21 of 21
  • Comments on "A simple stability test for 2-D systems" by G.E. Antoniou et al

    Publication Year: 1991
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (55 KB)  

    For original paper see ibid., vol.37, p.972-4 (1990). It is shown with an example that the stability test for all-pole 2-D systems given in the above-mentioned paper is not correct.<> View full abstract»

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  • Comments on "A naive approach to global optimization" by L.O. Chua

    Publication Year: 1991 , Page(s): 818 - 820
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (227 KB)  

    For original paper see ibid., vol.37, p.966-9 (1990). The commenters point out certain practical problems with a recently published approach to global optimization, and also describe briefly an algorithm which does not suffer from these problems. They claim that their method can be implemented in circuit form and using neural networks.<> View full abstract»

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  • Comments, with reply, on "The proof of M/sub 12/=M/sup 21/ based on stored energy is incorrect" by P.M. Lin

    Publication Year: 1991 , Page(s): 820 - 821
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (120 KB)  

    For original paper see ibid., vol.36, p.1153-58 (1989). The commenter claims that the proof that M/sub 12/=M/sub 21/ based on stored energy is correct. He briefly reviews the author's arguments and conventional proofs. In his reply, P.M. Lin disagrees with the commenter.<> View full abstract»

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  • IIR transfer function design with a double-objective differential correction algorithm

    Publication Year: 1991 , Page(s): 791 - 796
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (444 KB)  

    Proposes an extension of the differential correction algorithm for simultaneous design of real and imaginary parts of IIR (infinite impulse response) transfer functions in minimax norm. The implementation of the proposed algorithm requires the iterative solution of a minimization problem having linear objective and quadratic constraints. The method is globally convergent and it can be proven to deliver stable IIR filters. Practical implementations of the algorithm compare very favorably with existing design tools. Actual operation is examined by means of filter design examples View full abstract»

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  • A chaotic attractor with cellular neural networks

    Publication Year: 1991 , Page(s): 811 - 812
    Cited by:  Papers (29)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (132 KB)  

    A chaotic attractor has been observed with a nonautonomous cellular neural network (CNN) using an opposite-sign template. The network consists of only two cells and is driven by a sinusoidal input. It possesses the horseshoe structure. The map shows multiple strongly stretching and folding processes of the volume of flow. The attractor has interesting fractal structures View full abstract»

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  • Proof of the number of independent Kirchhoff equations in an electrical circuit

    Publication Year: 1991 , Page(s): 681 - 684
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (276 KB)  

    A compact inductive proof is presented that the number of linearly independent KCL (Kirchhoff's current law) node equations of b-branch n-node connected circuits is n-1 and the number of independent KVL (Kirchhoff's voltage law) loop equations is b-n+1. Because it is easily illustrated pictorially and does not rely on graph theoretic concepts it is suitable for presentation at an elementary level of circuit theoretic instruction View full abstract»

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  • Aggregation properties of linearized two-time-scale power networks

    Publication Year: 1991 , Page(s): 720 - 730
    Cited by:  Papers (22)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (836 KB)  

    In the slow coherency approach, the slow coherent areas of a power system are aggregated to form a slow subsystem to model the dynamics of the interchange between the areas. The aggregation process associated with the slow coherency approach that uses the singular perturbation technique to correct for the internal connections within the coherent areas to generate improved slow aggregates is discussed. Three aggregation properties are discussed: (1) the static load buses can be retained in the aggregation process; (2) the aggregation can be performed on a per-coherent-area basis; and (3) the aggregation process can be decomposed into a sequence of aggregating two coherent machines at each step. These properties allow practical algorithms to be designed for applying the slow coherency approach to large power systems View full abstract»

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  • Systolic array implementation of multipliers for finite fields GF(2m)

    Publication Year: 1991 , Page(s): 796 - 800
    Cited by:  Papers (44)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (372 KB)  

    A parallel-in-parallel-out systolic array and a serial-in-serial-out systolic array are proposed for fast multiplication in finite fields GF(2m) with the standard basis representation. Both of the architectures possess features of regularity, modularity, concurrency, and unidirectional data flow. As a consequence, they have high throughput rates and are well suited to VLSI implementation with fault-tolerant design. As compared to the related multipliers presented by C.S. Yeh et al. (see IEEE Trans. Comput., vol.C-33, p.357-360, Apr. 1984), the proposed parallel implementation makes it easier to incorporate fault-tolerant design, and the proposed serial implementation requires only one control signal instead of two View full abstract»

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  • Continuous-time LMS adaptive recursive filters

    Publication Year: 1991 , Page(s): 769 - 778
    Cited by:  Papers (33)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (972 KB)  

    An approach for implementing continuous-time adaptive recursive filters is presented. The resulting filters should be capable of operating on much higher signal frequencies than their digital counterparts since no sampling is required. With respect to implementation problems, the effects of DC offsets are investigated and formulas derived so that these effects can be estimated and reduced. It is shown that the DC offset performance is strongly affected by the choice of structure for the adaptive filter. Experimental results from a discrete prototype are given where accurate adaption is observed and DC offset effects are compared to theoretical predictions View full abstract»

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  • On frequency-wavenumber estimation by state-space realization

    Publication Year: 1991 , Page(s): 800 - 804
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (420 KB)  

    A frequency-wavenumber estimation problem usually requires a computationally expensive numerical search over a 2-D parameter space for the maximum or minimum of a function. A method using state-space models has been proposed. This method decomposes the 2-D problem into two 1-D problems and provides an analytical solution (i.e., without searching) in each dimension separately. It is shown how the separate estimates obtained by the state-space approach can be grouped into pairs of estimates corresponding to each 2-D signal. It is also shown how a 2-D forward-backward data matrix can be used to improve the performance of the state-space approach View full abstract»

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  • Novel analog-digital converters using voltage inverter switches. II. applications

    Publication Year: 1991 , Page(s): 685 - 693
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (584 KB)  

    For pt.I see ibid., vol.38, no.6, p.582-589 (1991). The use of voltage inverter switches (VIS) in analog-to-digital converter (ADC) circuits is described. In the first part of this paper VIS circuits were introduced, and their use in voltage reference circuits was demonstrated. In this second part, these reference circuits are incorporated into novel ADC circuits. Six different circuits are presented and analyzed; the principles on which these are based are the two-capacitor array, the algorithmic principle, the incremental principle, and the delta-sigma principle. The simulation of these circuits shows that the use of the VIS reference circuits leads to improved performance over current circuits. The circuits are based on CMOS technology and are wholly realizable on silicon View full abstract»

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  • A class of noniterative estimators for nonlinear image restoration

    Publication Year: 1991 , Page(s): 731 - 744
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1284 KB)  

    Noniterative estimators for the nonlinear image restoration problem are investigated. A general, nonlinear image formation model is considered in conjunction with a minimum-mean-square-error (MMSE) restoration approach. In the special case of a logarithmic nonlinearity, the optimal estimator is analytically derived within the class of algorithms that involve the inverse of the system's nonlinearity, followed by a linear transformation. This class of estimators is initiated by the nonlinear pseudo-inverse solution. The introduction of a combined-objective-function approach compensates for the stationarity assumption, incorporating both spatial and spectral information in the nonlinear MMSE algorithm. This approach results in an adaptive algorithm, which adjusts its performance with respect to the detailed structure of the image. The nonlinear restoration algorithms introduced are demonstrated through examples View full abstract»

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  • Consistent initial conditions of nonlinear networks with switches

    Publication Year: 1991 , Page(s): 698 - 710
    Cited by:  Papers (22)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1016 KB)  

    In the analysis of switched networks discontinuity of network variables and the presence of impulsive voltages and currents at the switching instants are often encountered. A theory for obtaining consistent initial conditions of electrical networks containing ideal switches and impulsive sources is proposed. The method is based on charge and flux conservation, and requires the solution of three one-element-kind networks. It is applicable immediately to networks with linear resistors, linear controlled sources, and linear or nonlinear capacitors and inductors View full abstract»

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  • A CNN chip for connected component detection

    Publication Year: 1991 , Page(s): 812 - 817
    Cited by:  Papers (83)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (544 KB)  

    The first working chips that implement a cellular neural network (CNN) are reported. They have been integrated in a CMOS 2-μm technology, and are intended for connected component detection processing applications. The operation is made in continuous time using analog circuitry. The design, fabrication, and testing of these chips are presented View full abstract»

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  • Class D synchronous rectifiers

    Publication Year: 1991 , Page(s): 694 - 697
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (248 KB)  

    A current-driven synchronous regulated class D rectifier is presented. An analysis of the rectifier is presented, and parameters are given. An advantage of the proposed circuit is that peak values of voltages across its elements are relatively low if compared with its output voltage. A symmetry between the rectifier and the voltage-switching half-bridge resonant class D amplifier is shown. Due to its simplicity, the rectifier can find applications in resonant DC/DC converters operating at a constant frequency. Experimental results were in good agreement with those predicted theoretically View full abstract»

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  • Pipelining in algorithms with quantizer loops

    Publication Year: 1991 , Page(s): 745 - 754
    Cited by:  Papers (49)  |  Patents (30)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (568 KB)  

    High-speed implementation of signal processing algorithms for digital transmission is addressed. The internal feedback or recursion in these algorithms makes it difficult to implement recursive systems concurrently using either pipelining or parallelism. In the past, look-ahead computation techniques were successfully applied to create necessary concurrency in linear recursive and some nonlinear recursive operations (such as the add-compare-select operation). Novel computation approaches are proposed, and the look-ahead technique is extended to pipeline the feedback loops containing finite-level quantizers. Approaches to pipeline piecewise-linear recursive systems are presented. The proposed architectures are suitable for real-time high-speed implementation of quantizer loop operations where the levels of quantizer and the order of the loops are small View full abstract»

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  • Interconnection delay in very high-speed VLSI

    Publication Year: 1991 , Page(s): 779 - 790
    Cited by:  Papers (34)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (792 KB)  

    Interconnection delay of VLSI in high-speed digital systems is addressed. A formal analysis of the signal propagation delay in VLSI circuits is presented. It is shown that, depending on the circuit parameters, there are basically two delay domains: the RC delay domain and the transmission-line-delay domain. The results derived from the more traditional lumped-RC model mainly capture the properties of the RC delay domain. However, in the transmission-line-delay domain the wire inductance becomes an important factor, and hence RC modeling is no longer adequate to estimate the delay. Two delay formulas are derived in this paper for the RC delay domain and the transmission-line-delay domain. The effect of feature size scaling on VLSI circuit performance is evaluated, and the inherent limitation on scaling due to interconnection delay is discussed. Finally, the relationship between delay and technology parameters such as wire resistance, capacitance, inductance, wire width and length, and load capacitance is investigated to provide design guidelines View full abstract»

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  • Overflow oscillations in state-space digital filters

    Publication Year: 1991 , Page(s): 807 - 810
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (284 KB)  

    A sufficient condition is established for the stability of general state-space digital filters implemented with two's complement arithmetic for the addition operation. A necessary and sufficient condition is established for the existence of period-T limit cycles in second-order direct-form digital filters. This theorem can be used to determine existence regions in the parameter plane for limit cycles of arbitrary period. Given the filter coefficients, this theorem can be used to find initial conditions that yield period-T limit cycles for any T, and all possible limit cycle vector sequences View full abstract»

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  • On the representation of infinite-length distributed RC one-ports

    Publication Year: 1991 , Page(s): 711 - 719
    Cited by:  Papers (45)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (544 KB)  

    Representations of infinite distributed RC one-ports are described. Two functions are introduced: the dipole intensity function (as the generalization of pole-zero pattern) and the time-constant density (as the generalization of the discrete time-constant set of a lumped network). Relations between these representations and the complex impedance are presented. These representations can be regarded as the generalization of the descriptions commonly used in the theory of lumped networks. The representations offer possibilities for the identification and for the synthesis of distributed RC networks. Although the representations were introduced for the case of RC networks, the results can also be applied directly for inductance-resistance networks. The use of the new representations is demonstrated by some examples View full abstract»

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  • New results on stable multidimensional polynomials. III. State-space interpretations

    Publication Year: 1991 , Page(s): 755 - 768
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1188 KB)  

    Lyapunov characterization of scattering Schur, reactance Schur, and immittance Schur properties of multidimensional polynomials are given. Since these polynomials arise in the description of passive systems, energy-like functions can be conveniently defined for such systems, thus making Lyapunov-type characterization readily available. It is shown that the notion of modal observability and its further variants for multidimensional systems are necessary ingredients of such considerations. Two approaches are followed. One is essentially passive synthesis based, whereas the other is that of viewing multidimensional systems as a parametric family of one-dimensional systems. A nontrivial example is included to illustrate the former method View full abstract»

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  • Small-signal analysis and minimum settling time design of a one-stage folded-cascode CMOS operational amplifier

    Publication Year: 1991 , Page(s): 804 - 807
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (308 KB)  

    A small-signal analysis of the single-ended one-stage folded-cascode CMOS operational amplifier is presented. The analysis results in a four-pole two-zero representation from which a two-pole model is extracted that is sufficiently accurate for many applications in switched-capacitor (SC) circuits. A design equation for obtaining the minimum settling time (MST) response for SC applications is given View full abstract»

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