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IEE Proceedings E - Computers and Digital Techniques

Issue 2 • Date Mar 1992

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Displaying Results 1 - 13 of 13
  • Identification of operational subcubes in unreliable hypercubes

    Publication Year: 1992, Page(s):117 - 122
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (408 KB)

    Hypercube multiprocessors can efficiently execute a wide class of parallel algorithms. To obtain a reliable result, the correct operation of all processors in the network must be ensured. However, the number of processors in a hypercube network grows exponentially with the network dimension, making the network susceptible to node failures. Fortunately, most of the basic algorithms developed for ne... View full abstract»

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  • Embedding graphs in books: a survey

    Publication Year: 1992, Page(s):134 - 138
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (308 KB)

    Embedding a graph in a book is an arrangement of vertices in a line along the spine of the book and edges on the pages in such a way that edges residing on the same page do not cross. Each graph has many different embeddings in books. The embedding with the minimum number of pages is optimum. This paper is a survey of problems dealing with embedding graphs in books. The author considers planar gra... View full abstract»

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  • Bi-way sorter: a two-dimensional systolic array

    Publication Year: 1992, Page(s):147 - 155
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (780 KB)

    A VLSI implementation of a new two-dimensional systolic array for sorting in a sequential input/output environment is described. The new 'bi-way' sorter allows double the key length in the same chip area than the previously proposed two-way sorter. A 10 bit, 20 number prototype bi-way sorting chip in 3 mu m CMOS has been tested at 9 MHz. Fast new techniques are described for sorting keys or sequen... View full abstract»

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  • Multilayer parallel distributed pattern recognition system model using sparse RAM nets

    Publication Year: 1992, Page(s):144 - 146
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (180 KB)

    The authors propose a novel multilayer parallel distributed pattern recognition system model in which the n-tuple principle in WISARD is followed and ordinary RAM nets are replaced by sparse RAM. The new system considers pattern correlation and is able to optimise n-tuple size a larger range through reduction of cost. Preliminary experiments with handwritten Chinese character recognition have conf... View full abstract»

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  • Concurrent error detection in array dividers by alternating input data

    Publication Year: 1992, Page(s):123 - 130
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (404 KB)

    Concurrent error detection (CED) schemes utilising time redundancy can keep chip area and interconnect to a minimum. An efficient time redundancy scheme, RESO, for array dividers has been reported. Under the same cell fault model, an alternated time redundancy CED scheme using alternating logic (AL) approach is proposed. Two array dividers are considered: nonrestoring array divider (NRD) and resto... View full abstract»

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  • Accurate filter for removing impulse noise from one- or two-dimensional signals

    Publication Year: 1992, Page(s):111 - 116
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (480 KB)

    This paper is concerned with the suppression of noise from one- or two-dimensional signals. Commonly, these will arise as acoustic waveforms or images from a variety of sources. The aim of this work is to ensure that the resulting signals are as distortion free as possible. Preceding work using the median filter has shown that it can result in edges being shifted by noise or (in two dimensions) as... View full abstract»

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  • Flexible systolic architecture for VLSI FIR filters

    Publication Year: 1992, Page(s):170 - 172
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (184 KB)

    A new systolic array architecture with a spiral structure of interconnections is proposed for very-high-throughput VLSI FIR filters. This architecture consists of L*K cells, where K is the filter order and 1 View full abstract»

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  • Two-/multi-action discretised learning routing algorithms in interaction with threshold-based flow control for computer networks

    Publication Year: 1992, Page(s):93 - 100
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (604 KB)

    The interactions between adaptive routing algorithms incorporating learning automata and a variable window flow control algorithm are examined. The routing algorithms examined use two new discretised learning automata to choose the minimum delay routes in the network. The first routing algorithm can choose between two possible candidate paths. The second algorithm, using a new fast and accurate mu... View full abstract»

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  • Fast linear congruential pseudorandom number generators using the Messerschmitt pipelining transformation

    Publication Year: 1992, Page(s):131 - 133
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (212 KB)

    The authors show that, despite their recursive nature, linear congruential pseudorandom number generators may be pipelined for high speed operation by means of the Messerschmitt transformation using an iterated version of the system equation. They suggest an appropriate architecture for multiply iterated LCGs pipelined in this way: the hardware overhead required to obtain high speed operation by m... View full abstract»

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  • Integration of user authentication and access control

    Publication Year: 1992, Page(s):139 - 143
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (416 KB)

    User authentication and access control are both necessary mechanisms for data protection in a computer system. Traditionally, they are implemented in different modules. A new solution is presented to provide both user authentication and access control in a single module to avoid any possible security breach between these two protection mechanisms. The secret information required for the whole syst... View full abstract»

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  • Syntactic techniques for pattern recognition on sampled data signals

    Publication Year: 1992, Page(s):156 - 164
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (640 KB)

    The established statistical pattern recognition techniques perform measurements either directly or on preprocessed sets of data samples and attempt to extract a multidimensional vectorial representation from which pattern types can be classified using clustering techniques. This permits the identification, for example, of specific fault conditions within the input data. The new syntactic technique... View full abstract»

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  • Parallel architectures for higher-radix division

    Publication Year: 1992, Page(s):101 - 110
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (768 KB)

    A general approach for designing units for higher-radix division is outlined which is based on several subunits operating in parallel. A lower-radix-division unit is used as the building block of the architecture, and the division step is split into two phases which are carried out in parallel. It is shown that the proposed architecture permits the design of units for higher-radix division with di... View full abstract»

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  • Processor arrays for matrix triangularisation with partial pivoting

    Publication Year: 1992, Page(s):165 - 169
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (316 KB)

    Two processor arrays for triangularisation of dense matrices using Gaussian elimination with partial pivoting are synthesised from the algorithm description. These arrays consist of processing modules with FIFO buffers and manifest local intermodule communications. Both the one- and two-dimensional arrays process an n*n matrix in O(n2) time, while the last allows an O(n) block pipelinin... View full abstract»

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