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IEEE Design & Test of Computers

Issue 5 • May 2006

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Displaying Results 1 - 25 of 26
  • [Front cover]

    Publication Year: 2006, Page(s): c1
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  • [Inside front cover]

    Publication Year: 2006, Page(s): c2
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  • IEEE Computer Society Celebrates Two 60-Year Anniversaries

    Publication Year: 2006, Page(s): 329
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  • Table of contents

    Publication Year: 2006, Page(s):330 - 331
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  • Masthead

    Publication Year: 2006, Page(s): 332
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  • The New World of ESL Design

    Publication Year: 2006, Page(s): 333
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  • IEEE Computer Society Digital Library Packages for Institutions

    Publication Year: 2006, Page(s): 334
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  • Guest Editors' Introduction: The True State of the Art of ESL Design

    Publication Year: 2006, Page(s):335 - 337
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (168 KB) | HTML iconHTML

    ESL, or electronic-system level, has found its way into the mainstream EDA vocabulary in the past few years because of increased interest in finding new ways to raise the abstraction level for the design entry point during the electronic-systems design process. The guest editors discuss ESL's emergence and their special issue devoted to the topic. View full abstract»

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  • A Component-Based Design Environment for ESL Design

    Publication Year: 2006, Page(s):338 - 347
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (429 KB) | HTML iconHTML

    In this article, we present Gezel, a component-based, electronic system-level (ESL) design environment for heterogeneous designs. Gezel consists of a simple but extendable hardware description language (HDL) and an extensible simulation-and-refinement kernel. Our approach is to create a system by designing, integrating, and programming a set of programmable components. These components can be proc... View full abstract»

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  • Modeling Embedded Systems: From SystemC and Esterel to DFCharts

    Publication Year: 2006, Page(s):348 - 358
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (136 KB) | HTML iconHTML

    This article addresses the need for directly expressing heterogeneous, hierarchical behaviors for modeling specific embedded systems. After analyzing two existing ESL languages, SystemC and Esterel, the authors create a new model of computation and a graphical language to gain the direct expressivity they need for their model. Although researchers have suggested various changes to SystemC and Este... View full abstract»

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  • A Platform-Based Taxonomy for ESL Design

    Publication Year: 2006, Page(s):359 - 374
    Cited by:  Papers (77)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (375 KB) | HTML iconHTML

    This article presents a taxonomy for ESL tools and methodologies that combines UC Berkeley's platform-based design terminologies with Dan Gajski's Y-chart work. This is timely and necessary because in the ESL world we seem to be building tools without first establishing an appropriate design flow or methodology, thereby creating a lot of confusion. This taxonomy can help stem the tide of confusion View full abstract»

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  • The Challenges of Synthesizing Hardware from C-Like Languages

    Publication Year: 2006, Page(s):375 - 386
    Cited by:  Papers (50)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (127 KB) | HTML iconHTML

    This article presents one side of an ongoing debate on the appropriateness of C-like languages as hardware description languages. The article examines various features of C and their mapping to hardware, and makes a cogent argument that vanilla C is not the right language for hardware description if synthesis is the goal. C-like languages are far more compelling for these tasks, and one in particu... View full abstract»

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  • A Different View: Hardware Synthesis from SystemC is a Maturing Technology

    Publication Year: 2006, Page(s): 387
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (48 KB) | HTML iconHTML

    Commercial SystemC synthesis tools routinely produce more efficient hardware than handwritten RTL code typically produces. We argue that properties of C-like languages make this synthesis process computationally hard and time-consuming. Although some of the properties has cited do make synthesis more difficult, those problems have largely been solved. Fundamentally, the complexity imposed on these... View full abstract»

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  • Guest Editor's Introduction: ITC Helps Get More Out of Test

    Publication Year: 2006, Page(s):388 - 389
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (89 KB) | HTML iconHTML

    This special section, along with the International Test Conference 2006, highlights the value that test adds to the electronics manufacturing business. It leads us to think about test in a whole new way. View full abstract»

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  • Extracting Defect Density and Size Distributions from Product ICs

    Publication Year: 2006, Page(s):390 - 400
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (210 KB) | HTML iconHTML

    Defect density and size distributions (DDSDs) are important parameters for characterizing spot defects in a process. This article addresses random spot defects, which affect all processes and currently require a heavy silicon investment to characterize and a new approach is proposed for characterizing such defects. This approach presents a system that overcomes the obstacle of silicon area overhea... View full abstract»

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  • IEEE Computer Society Information

    Publication Year: 2006, Page(s): 401
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  • Improving Transition Delay Test Using a Hybrid Method

    Publication Year: 2006, Page(s):402 - 412
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (141 KB) | HTML iconHTML

    The transition-fault-testing technique combines the launch-off-shift method and an enhanced launch-off-capture method for scan-based designs. The technique improves fault coverage and reduces pattern count and scan-enable design effort. It is practice oriented, suitable for low-cost testers, and implementable with commercial ATPG tools. Scan-based structural tests increasingly serve as a cost- eff... View full abstract»

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  • Call for Papers: Special Issue on IR-Drop and Power Supply Noise Effects on Design and Test of Very Deep-Submicron Designs

    Publication Year: 2006, Page(s): 413
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  • Impact of Thermal Gradients on Clock Skew and Testing

    Publication Year: 2006, Page(s):414 - 424
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (223 KB) | HTML iconHTML

    In this article, we analyze the impact of within-die thermal gradients on clock skew, considering temperature's effect on active devices and the interconnect system. This effect, along with the fact that the test-induced thermal map can differ from the normal-mode thermal map, motivates the need for a careful consideration of the impact of temperature gradients on delay during test. After our anal... View full abstract»

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  • Test Technology TC Newsletter

    Publication Year: 2006, Page(s): 425
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  • Book Reviews: A Comprehensive EDA Handbook

    Publication Year: 2006, Page(s):426 - 427
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  • Standards: DASC sees moves toward formality in design

    Publication Year: 2006, Page(s):428 - 429
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (84 KB) | HTML iconHTML

    We discussed two interesting standardization proposals: Rosetta and Esterel version 7. Both are based on technology that has been under development for a long time, and both target the formalization of system-level design and verification. System-level design involves consolidating information from multiple domains to predict the effects of design decisions. To support system-level design, a langu... View full abstract»

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  • CEDA Currents

    Publication Year: 2006, Page(s):430 - 431
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  • Getting More out of ITC

    Publication Year: 2006, Page(s): 432
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  • IEEE Computer Society ReadyNotes Information

    Publication Year: 2006, Page(s): c3
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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty