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IEEE Transactions on Computers

Issue 3 • Date March 1992

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Displaying Results 1 - 17 of 17
  • Comments on "Design and analysis of arbitration protocols" by F. El Guibaly

    Publication Year: 1992, Page(s):348 - 351
    Cited by:  Papers (3)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (337 KB)

    In the above-titled paper by F. El Guibaly (see ibid., vol.38, p.161-71, (1989)), the (normalized) access time for various arbitration protocols was theoretically characterized. The commenter uses simulations to investigate single-bus multiprocessor arbitration protocols. Differences are found between the theoretical results and the simulation results. Theoretical formulae given by El Guibaly are ... View full abstract»

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  • Efficient tridiagonal solvers on multicomputers

    Publication Year: 1992, Page(s):286 - 296
    Cited by:  Papers (27)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (824 KB)

    Three parallel algorithms, namely, the parallel partition LU (PPT) algorithm, the parallel partition hybrid (PPH) algorithm, and the parallel diagonal dominant (PDD) algorithm, are proposed for solving tridiagonal linear systems on multicomputers. These algorithms are based on the divide-and-conquer parallel computation model. The PPT and PPH algorithms support both pivoting and nonpivoting. The P... View full abstract»

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  • On optimal single jog river routing [VLSI layout]

    Publication Year: 1992, Page(s):366 - 369
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (364 KB)

    The wiring problem of providing a planar rectilinear wire connection between two sets of terminals which lie on two horizontal lines in the plane is called the river routing. The problem has been widely studied. It is normally studied in conjunction with design variable(s) optimization problem. The author studies this problem when there is at most one horizontal segment in each wire. Efficient opt... View full abstract»

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  • Boolean matrix transforms for the minimization of modulo-2 canonical expansions

    Publication Year: 1992, Page(s):342 - 347
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (480 KB)

    Fast transforms for computing modulo-2 ring-sum canonical expansions of a Boolean function are described using Kronecker products of elementary Boolean matrices. These transforms unify and generalize existing ones in the literature. Previous algorithms which employ such transforms for finding a minimal fixed polarity expansion (FPE) are reviewed, analyzed, and extended to a minimal fixed basis exp... View full abstract»

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  • Data flow representation of iterative algorithms for systolic arrays

    Publication Year: 1992, Page(s):351 - 355
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB)

    An algebraic representation is proposed for regular iterative algorithms that can be described as bundles of data flows with different wavefronts. A form corresponding to a geometric representation such as a dependence graph is obtained by modeling data flows with a generating function of a power series. The main attributes of systolic algorithms and arrays are revealed by a unique dataflow repres... View full abstract»

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  • On the assignment problem of arbitrary process systems to heterogeneous distributed computer systems

    Publication Year: 1992, Page(s):257 - 273
    Cited by:  Papers (42)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1244 KB)

    The authors propose and evaluate an efficient hierarchical clustering and allocation algorithm that drastically reduces the interprocess communications cost while observing lower and upper bounds of utilization for the individual processors. They compare the algorithm with branch-and-bound-type algorithms that can produce allocations with minimal communication cost, and show a very encouraging tim... View full abstract»

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  • Evaluating design choices for shared bus multiprocessors in a throughput-oriented environment

    Publication Year: 1992, Page(s):297 - 317
    Cited by:  Papers (17)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1368 KB)

    The authors consider the evaluation of design choices in multiprocessors with a single, shared bus interconnect operating in an environment in which each task is being executed on a single processor and the performance of the multiprocessor is measured by its overall throughput. To evaluate design choices, they develop mean value analysis analytical models and validate the models by comparing thei... View full abstract»

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  • Bottleneck Steiner trees in the plane

    Publication Year: 1992, Page(s):370 - 374
    Cited by:  Papers (26)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (440 KB)

    A Steiner tree with maximum-weight edge minimized is called a bottleneck Steiner tree (BST). The authors propose a Θ(|ρ| log |ρ|) time algorithm for constructing a BST on a point set ρ, with points labeled as Steiner or demand; a lower bound, in the linear decision tree model, is also established. It is shown that if it is desired to minimize further the number of used Steiner po... View full abstract»

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  • Some combinatorial aspects of parallel algorithm design for matrix multiplication

    Publication Year: 1992, Page(s):355 - 361
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (528 KB)

    Some combinatorial characteristics of matrix multiplication on regular two-dimensional arrays are studied. From the studies, the authors are able to design many efficient varieties of the cylindrical array and the two-layered mesh array for matrix multiplication. To design a cylindrical array for matrix multiplication, a systematic design procedure is proposed. In this design procedure, Latin squa... View full abstract»

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  • Destination tag routing techniques based on a state model for the IADM network

    Publication Year: 1992, Page(s):274 - 285
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1116 KB)

    A `state model' is proposed for solving the problem of routing and rerouting messages in the inverse augmented data manipulator (IADM) network. Necessary and sufficient conditions the reroutability of messages are established using this model, and destination tag schemes are derived. These schemes are simpler, more efficient, and require less complex hardware than previously proposed routing schem... View full abstract»

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  • Complexity of fault diagnosis in comparison models

    Publication Year: 1992, Page(s):318 - 324
    Cited by:  Papers (32)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (524 KB)

    The authors consider a comparison-based probabilistic model for multiprocessor fault diagnosis. They study the problem of optimal diagnosis, which is to correctly identify the status (faulty/fault-free) of units in the system, with maximum probability. For some parameter values, this probabilistic model is well approximated by the asymmetric comparison model introduced by M. Malek (1980). For arbi... View full abstract»

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  • Initializability consideration in sequential machine synthesis

    Publication Year: 1992, Page(s):374 - 379
    Cited by:  Papers (33)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (548 KB)

    It is shown that a finite-state machine, whose state encoding is obtained only to reduce the amount of logic in the final implementation, may not be initializable by a logic simulator or a test generator even when the circuit is functionally initializable (i.e. has synchronizing sequences). A fault simulator or a sequential circuit test generator that assumes all memory elements initially to be in... View full abstract»

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  • PPMB: a partial-multiple-bus multiprocessor architecture with improved cost-effectiveness

    Publication Year: 1992, Page(s):361 - 366
    Cited by:  Papers (6)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (468 KB)

    The authors address the design and performance analysis of partial-multiple-bus interconnection networks. They are bus architectures that have evolved from the multiple-bus structure by dividing buses into groups and reducing bus connections. Their effect is to reduce cost and alleviate arbitration and drive requirements without degrading performance significantly. One such structure, called proce... View full abstract»

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  • Abstractions of finite-state machines and immediately-detectable output faults

    Publication Year: 1992, Page(s):325 - 338
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (972 KB)

    A general way to make a smaller model of a large system, or to represent the fact that the observations possible on it are limited, is to apply an abstraction A to it. If the system is modeled by a finite-state machine M, the abstraction consists of three partitions, one for each of the state, input, and output sets. States, inputs, or outputs lumped together in one block by the ... View full abstract»

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  • A microprocessor-based office image processing system-an extension of work

    Publication Year: 1992, Page(s):379 - 381
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (216 KB)

    The authors extend the work done by L.M. Ni et al. (see ibid., vol.C-31, p.1017-22 (1982)) on microprocessor-based office image processing systems. Ni et al. did not distinguish between the compute-bound and I/O-bound state of the machine in the case where image input time is greater than the output time. The authors clearly show the above distinction and present the correct expressions for such c... View full abstract»

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  • Systolic super summation with reduced hardware

    Publication Year: 1992, Page(s):339 - 342
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (336 KB)

    A systolic super summer is a cellular apparatus for summing floating-point numbers. The apparatus receives floating-point summands, converting them to fixed-point within a sieve-like cellular array. The emerging fixed-point numbers are summed in a pipelined array of long accumulators. An improved design is presented for the summer's sieve. Although the new sieve is structurally simpler and uses le... View full abstract»

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  • An algorithm for optimal static load balancing in distributed computer systems

    Publication Year: 1992, Page(s):381 - 384
    Cited by:  Papers (57)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB)

    The authors propose a load-balancing algorithm that determines the optimal load for each host so as to minimize the overall mean job response time in a distributed computer system that consists of heterogeneous hosts. The algorithm is a simplified and easily understandable version of the single-point algorithm originally presented by A.N. Tantawi and D. Towsley (1985) View full abstract»

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The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org