IEEE Transactions on Computers

Issue 9 • Sept. 1968

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  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1968, Page(s):c1 - 924
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  • IEEE Computer Group

    Publication Year: 1968, Page(s): c2
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  • Editor's Notice

    Publication Year: 1968, Page(s): 821
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  • A Mathematical Model Characterizing Four-Phase MOS Circuits for Logic Simulation

    Publication Year: 1968, Page(s):822 - 826
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (832 KB)

    Abstract—Four-phase MOS circuits exhibit many peculiar features not observed in other families of logic circuits. In this paper, a mathematical model which characterizes the circuits is presented for logic simulation. It is shown that this model enables us to develop a computer program which can rapidly and efficiently verify and evaluate the logic design of the circuits. View full abstract»

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  • The Use of Delay Lines in Reading a Manchester Code

    Publication Year: 1968, Page(s):827 - 845
    Cited by:  Papers (1)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5253 KB)

    Abstract—In high-speed magnetic surface recording devices such as disk memory and drum memory of digital computers, the read-out signal may be as low as 1 mV. If the read-out circuit is not properly designed, the signal-to-noise ratio could easily drop down to a level such that the digital information could not be reconstructed. It is, therefore, of vital importance that the data reconstruct... View full abstract»

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  • Error-Checking Logic for Arithmetic-Type Operations of a Processor

    Publication Year: 1968, Page(s):845 - 849
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (907 KB)

    Abstract—A method of extending the usefulness of residue coding (or congruence checking) to check for errors in operations such as complement, shift, and rotate (or cycle) is presented. The checking logic and a practical method for its implementation are derived. The cost of check circuitry is only of the order of 30 to 40 percent of the part of the processor that is subjected to checking. I... View full abstract»

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  • A Digital System Design Language (DDL)

    Publication Year: 1968, Page(s):850 - 861
    Cited by:  Papers (40)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2484 KB)

    Abstract—Successful design and manufacture of future digital systems will depend upon the availability of a suitable design language. A precise, concise language is presented which facilitates the specification of complex digital systems. The language 1) is independent of any particular technology, design procedure, machine organization, etc., 2) allows specification at different levels of d... View full abstract»

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  • Design of Pattern Classifiers with the Updating Property Using Stochastic Approximation Techniques

    Publication Year: 1968, Page(s):861 - 872
    Cited by:  Papers (17)
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    Abstract—A nonparametric training procedure for finding the optimal weights of the discriminant functions of a pattern classifier in any optimization criterion, expressible as a convex function from an arbitrary sequence of sample patterns, is proposed. This design procedure is based on the stochastic approximation technique, and has the updating property because it processes the sample patt... View full abstract»

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  • The Synthesis of Binary Sequence Detectors

    Publication Year: 1968, Page(s):873 - 880
    Cited by:  Papers (1)
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    Abstract—A method is presented for synthesizing a sequential network for detecting a given n-place nonperiodic binary sequence within a data stream. The n-place nonperiodic sequence is characterized as a binary (n, r) ring sequence. The state assignment for r 2-state memory elements is determined from an ordered set of n distinct subsequences r bits in length. The minimization of r simultane... View full abstract»

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  • A Formula for Logical Network Cost

    Publication Year: 1968, Page(s):881 - 884
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (632 KB)

    Abstract—The cost, or complexity, of a switching network is defined in two ways: by its diode count and by the number of modules from a predefined set required to build it. These modules were chosen as representative of a modular diode-transistor technology. With the aid of Monte Carlo methods the following formula was obtained for the average cost, C(n, g, h), of the two-level minimal form ... View full abstract»

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  • On the Implementation of Failure-Tolerant Counters

    Publication Year: 1968, Page(s):885 - 886
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (480 KB)

    Abstract—A new method of designing and implementing intrinsically failure-tolerant counters with error-correcting state assignments is proposed. Threshold logic elements are used, and state recovery circuitry is united with the flip-flop input logic. A decimal counter built according to this method requires considerably fewer components and has a lower probability of failure at less cost tha... View full abstract»

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  • A Division Algorithm for Signed-Digit Arithmetic

    Publication Year: 1968, Page(s):887 - 889
    Cited by:  Papers (24)  |  Patents (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (632 KB)

    Abstract—The application of a fast division algorithm, particu-larly suitable for floating-point arithmetic, to signed-digit number systems is described. This method, based on the method of A. Svo-boda, is performed in two steps: 1) the divisor is adjusted to be of the form (1+e) where e is a fractional quantity, while the dividend is adjusted accordingly, and 2) the generation of each quoti... View full abstract»

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  • An Analysis of High-Speed, Linear-Passive Binary, Read-Only Stores

    Publication Year: 1968, Page(s):889 - 893
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    Abstract—A general analysis of conventional high-speed, linearpassive, binary, READ-only stores is performed by the application of the scattering-matrix formalism. It is found that for a broad class of cases, which include most READ-only stores that have been discussed in the literature, the maximum transmission of power from a word driver to a sense amplifier is one divided by the number of... View full abstract»

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  • A High-Speed Threshold Memory Element

    Publication Year: 1968, Page(s):893 - 894
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    Abstract—This note describes a new analog-memory or variable- weight device that can be set to any of 100 stable states and switched between states in 100 ns or less. The device uses the coupling between a circularly polarized microwave signal (as generated by a helical structure) and a partially switched ferrite core. View full abstract»

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  • A Note on Embedding Nonlinear Machines

    Publication Year: 1968, Page(s):894 - 896
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    Abstract—The problem of embedding nonlinear machines into larger, linear ones is considered. The notions involved are carefully defined, and a set of necessary and sufficient conditions for a submachine of a linear machine to be nonlinear is given, for the case in which the submachine utilizes the full input alphabet. An example illustrates the most important theorems. View full abstract»

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  • Solution of Nonlinear Equations

    Publication Year: 1968, Page(s):897 - 898
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (344 KB)

    Abstract—A new approach to solving a set of nonlinear equations, described by fi(x1, x2, . . ., xn) = 0, i= 1, 2, ..., n, is presented. The computation is carried out by simple matrix inversion and matrix multiplication without evaluation of ∂fi/∂xj. Thus, computation time is saved. The method converges rapidly if the initial approximation is close to the solution. A specific exa... View full abstract»

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  • Comments on "Hybrid Computer Solution of Optimal Control Problems by the Maximum Principle"

    Publication Year: 1968, Page(s): 899
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB)

    In their recent short note,1 Miura et al. present a unique hybrid computer solution to certain optimal control problems. However, the authors give the impression that they are unaware of current research in this area represented by a voluminous amount of literature and numerous conferences devoted to this topic. The authors enumerate the problems and shortcominings of "conventional" techniques, ye... View full abstract»

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  • Further Comments on "Synthesis of Symmetric Switching Functions Using Threshold Logic Networks"1

    Publication Year: 1968, Page(s):899 - 900
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    Recently, Fischler and Tannenbaum2indicated a counter example to Theorem 2 of this author's short note.1Theorem 2 (as well as the other theorems in the note) is a statement of the sufficiency conditions only. This means that if the conditions given in Theorem 2 are satisfied, then it is always possible to find a minimal realization for five positive transitions. It does not s... View full abstract»

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  • Contributors

    Publication Year: 1968, Page(s):901 - 902
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  • Abstracts of Current Computer Literature

    Publication Year: 1968, Page(s):903 - 921
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  • R68-40 Sequential Machines and Automata Theory

    Publication Year: 1968, Page(s):922 - 923
    Cited by:  Papers (1)
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  • R68-41 Development of Executive Routines, Both Hardware and Software

    Publication Year: 1968, Page(s):923 - 924
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  • R68-42 On Designing Generalized File Records for Management Information Systems

    Publication Year: 1968, Page(s): 924
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  • R68-43 Two Continuous System Modelling Programs

    Publication Year: 1968, Page(s): 924
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  • Information for authors

    Publication Year: 1968, Page(s): 924
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org