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IEEE Transactions on Computers

Issue 12 • Date Dec. 1968

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Displaying Results 1 - 19 of 19
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1968, Page(s):c1 - 1230
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  • IEEE Computer Group

    Publication Year: 1968, Page(s): c2
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  • Construction of Multistep Integration Formulas for Simulation Purposes

    Publication Year: 1968, Page(s):1121 - 1131
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1696 KB)

    Abstract—Block-oriented simulation languages are a powerful tool for solving simulation problems. A problem of major importance in simulation, however, is the choice of the integration formula to be employed in the integration block. Users of early simulation languages had no difficulty selecting a formula since these languages provided only a single formula. Advanced languages have a number... View full abstract»

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  • Analysis of Asynchronous Circuits Under Different Delay Assumptions

    Publication Year: 1968, Page(s):1131 - 1143
    Cited by:  Papers (6)
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    Abstract—Asynchronous circuits are analyzed from the stand- point of different constraints which may apply to the stray delays (zero-line delays, bounded delays, and the use of delay elements). The relationship between "hazard-free" sequential networks and "speed independent" circuits is illuminated. Speed independence is defined relative to a fundamental mode circuit (which in turn may be d... View full abstract»

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  • Control Storage Use in Implementing an Associative Memory for a Time-Shared Processor

    Publication Year: 1968, Page(s):1144 - 1151
    Cited by:  Papers (1)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1464 KB)

    Abstract—The Cambridge System, comprising a standard IBM System/360 Model 40 and an associative memory, is described from the viewpoint of its implementation using the READ-only control storage of the Model 40. In particular, we discuss the use of the ROS in 1) controlling the flow of data between the CPU and the associative memory registers, and 2) handling translation control, absent page ... View full abstract»

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  • Sequential Decision-Making Device for Information-Processing Applications

    Publication Year: 1968, Page(s):1151 - 1156
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1360 KB)

    Abstract—This paper describes the concept of a hardware sequential decision-making device consisting principally of an array or network of nodes which can support a plurality of connections among the nodes on a simultaneous basis. The connection "chains" the nodes together. The application of the device to a dynamic computer memory allocation system is described in the paper. In this use, ea... View full abstract»

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  • Generalized Inverse Approach to Adaptive Multiclass Pattern Classification

    Publication Year: 1968, Page(s):1157 - 1164
    Cited by:  Papers (36)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1184 KB)

    Abstract—In this paper a least-square approach to multiclass pattern classification is undertaken. The generalized inverse computation is used to furnish a quick solution to the problem of fixed training samples. The use of recursive on-line computation is also recommended. Experimental results are presented to illustrate the approach. Both deterministic and statistical interpretations have ... View full abstract»

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  • Synthesis of Nonlinear Decision Boundaries by Cascaded Threshold Gates

    Publication Year: 1968, Page(s):1165 - 1172
    Cited by:  Papers (4)
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    Abstract—This paper presents a technique for generating a nonlinear decision surface that separates two finite classes of elements in n-dimensional real space. It incorporates the principle of cascaded threshold gates in evolving the required separation surface. At each stage of the design, an additional cascaded gate is added which will separate at least one new element. Necessary and suffi... View full abstract»

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  • Near-Optimal Ordering of Electronic Circuit Equations

    Publication Year: 1968, Page(s):1173 - 1174
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (376 KB)

    Abstract—An implementation of an algorithm for near-optimal ordering of sparse network equations is described. Such ordering can result in considerable savings in computer time and may be applied to various types of analysis programs. A sample problem demonstrates a saving in computer time in excess of 50 percent. View full abstract»

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  • Ternary Cyclo-Decompositions

    Publication Year: 1968, Page(s):1175 - 1176
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (368 KB)

    Abstract—This note discusses a particular kind of ternary functional decomposition based on a ternary function ↑ to be performed on the set of composite functions. Such function is closely related to the cycling concept of Postian algebras. A systematic method is given to determine the set of all decompositions of that kind admitted by the function. Such set is called the cyclo-set and... View full abstract»

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  • Realization of Sequential Machines

    Publication Year: 1968, Page(s): 1177
    Cited by:  Papers (2)
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  • Contributors

    Publication Year: 1968, Page(s):1178 - 1179
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  • R68-51 The Design of an Automatic Patching System

    Publication Year: 1968, Page(s):1179 - 1181
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  • R68-52 The Structure of the "The"-Multiprogramming System

    Publication Year: 1968, Page(s): 1181
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  • R68-53 A System for Interactive Graphical Programming

    Publication Year: 1968, Page(s):1181 - 1182
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  • Abstracts of Current Computer Literature

    Publication Year: 1968, Page(s):1183 - 1230
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  • Blank Page

    Publication Year: 1968, Page(s): 1230
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  • Blank Page

    Publication Year: 1968, Page(s): 1230
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  • Information for authors

    Publication Year: 1968, Page(s): 1230
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org