IEEE Transactions on Computers

Issue 6 • June 1987

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  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1987, Page(s): c1
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  • IEEE Computer Society

    Publication Year: 1987, Page(s): c2
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  • Editor's Notice

    Publication Year: 1987, Page(s):645 - 646
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  • IEEE Transactions on Computers Referee List for 1986-1987

    Publication Year: 1987, Page(s):646 - 649
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  • Design of a Functionally Distributed, Multiprocessor Database Machine Using Data Flow Analysis

    Publication Year: 1987, Page(s):650 - 666
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5003 KB)

    We propose a design methodology based on data flow analysis for a functionally distributed, multiprocessor database machine. We define a cost model of database processing with the objective cost being response time of a set of query strategies. Heuristic optimization techniques are proposed using the operations of grouping, decomposition, and replication. We apply the new optimization techniques i... View full abstract»

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  • Task Allocation and Precedence Relations for Distributed Real-Time Systems

    Publication Year: 1987, Page(s):667 - 679
    Cited by:  Papers (99)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3573 KB)

    In a distributed processing system with the application software partitioned into a set of program modules, allocation of those modules to the processors is an important problem. This paper presents a method for optimal module allocation that satisfies certain performance constraints. An objective function that includes the intermodule communication (IMC) and accumulative execution time (AET) of e... View full abstract»

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  • A Characterization and Analysis of Parallel Processor Interconnection Networks

    Publication Year: 1987, Page(s):680 - 691
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4813 KB)

    The permuting properties of various interconnection networks have been extensively studied. However, not too much attention has been focused on how the permuting properties interact with the mapping of tasks to processors in realizing the communication requirements between tasks. In this paper we focus on characterizing the abilities of some interconnection networks in realizing intertask communic... View full abstract»

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  • Analysis of a New Retransmission Control Algorithm for Slotted CSMA/CD LAN's

    Publication Year: 1987, Page(s):692 - 701
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3010 KB)

    Algorithms for the control of the retransmission procedure in random multiple access schemes are needed to ensure stability of the system operation under high traffic conditions. Optimal retransmission control policies cannot be applied in practice since they are based on global information about the system state. In the case of the most well-known implementation of the CSMA/CD protocol, ANSI/IEEE... View full abstract»

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  • Discrete Optimization Problem in Local Networks and Data Alignment

    Publication Year: 1987, Page(s):702 - 713
    Cited by:  Papers (85)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2963 KB)

    This paper presents the solution of the following optimization problem that appears in the design of double-loop structures for local networks and also in data memory, allocation and data alignment in SIMD processors. View full abstract»

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  • A GaAs-Based Microprocessor Architecture for Real-Time Applications

    Publication Year: 1987, Page(s):714 - 727
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4931 KB)

    This paper analyzes the potential performance of a high-level language (HLL) microprocessor architecture for special- purpose real-time applications. Our approach is based on mapping of HLL constructs into microcode, a concept called vertical migration. An analytical execution-time model of the reduced vertical-migration architecture is developed. It is applied to two different workload models: on... View full abstract»

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  • Distributed Nodes Organization Algorithm for Channel Access in a Multihop Dynamic Radio Network

    Publication Year: 1987, Page(s):728 - 737
    Cited by:  Papers (94)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2993 KB)

    This paper proposes a solution to providing a collision free channel allocation in a multihop mobile radio network. An efficient solution to this problem provides spatial reuse of the bandwidth whenever possible. A robust solution maintains the collision free property of the allocation under any combination of topological changes. The node organization algorithm presented in this paper provides a ... View full abstract»

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  • Evaluation of Performability for Degradable Computer Systems

    Publication Year: 1987, Page(s):738 - 744
    Cited by:  Papers (45)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2523 KB)

    The performability of degradable heterogeneous computer systems containing k > 1 types of components is considered. Previous analyses of such systems have been numerical in nature and yielded algorithms with either exponential complexity in the number of system states n, or polynomial in n with approximate truncations of infinite series. In this paper, a closed form expression for the performab... View full abstract»

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  • Minimum-Area Wiring for Slicing Structures

    Publication Year: 1987, Page(s):745 - 760
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4021 KB)

    In this paper we consider the problem of optimal wiring of VLSI circuits. The topological placement of the circuit elements (macros) on the chip is assumed to have a special hierarchical structure, i.e., to be a slicing floorplan, represented by a binary (slicing) tree. Instead of the usual objective of minimum wire length, we consider the problem of minimizing the overall area of the wired floorp... View full abstract»

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  • Effective Memory Bandwidth and Processor Blocking Probability in Multiple-Bus Systems

    Publication Year: 1987, Page(s):761 - 764
    Cited by:  Papers (27)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (772 KB)

    This correspondence presents two expressions in calculating effective memory bandwidth for a wide range of multiple-bus configurations. Also presented is an analytical solution for determining each processor's blocking probability in a multiple-bus system where different priorities are assigned to the processors. View full abstract»

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  • Implementing Exact Calculations in Hardware

    Publication Year: 1987, Page(s):764 - 768
    Cited by:  Papers (1)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1045 KB)

    A technique for performing exact calculations it discussed. The technique uses single-modulus P arithmetic to perform calculations over the finite field of integers and the finite ring of integers. It is shown that the arithmetic operations modulo P (which obviously can be impleinented in microprocessor configurations, VLSI, and/or software) can easily be extended from the range of values of the f... View full abstract»

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  • A New Benes Network Control Algorithm

    Publication Year: 1987, Page(s):768 - 772
    Cited by:  Papers (34)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (895 KB)

    A new Benes network control algorithm is presented. Unlike the original looping algorithm, the new algorithm is not recursive. In this algorithm (N x N) Benes network is viewed as a concatenation of two subnetworks SN1 and SN2. The first (log N - 1) stages of a Benes network correspond to SN1, and the remaining log N stages correspond to SN2. SN1 is controlled by a full binary tree of set partitio... View full abstract»

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  • IEEE Computer Society Publications

    Publication Year: 1987, Page(s): 772
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  • Information for authors

    Publication Year: 1987, Page(s): 772
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org