By Topic

IEEE Transactions on Computers

Issue 2 • Date Feb. 1986

Filter Results

Displaying Results 1 - 18 of 18
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1986, Page(s): c1
    Request permission for commercial reuse | PDF file iconPDF (421 KB)
    Freely Available from IEEE
  • IEEE Computer Society

    Publication Year: 1986, Page(s): c2
    Request permission for commercial reuse | PDF file iconPDF (183 KB)
    Freely Available from IEEE
  • Introduction—Multiple-Valued Logic

    Publication Year: 1986, Page(s):97 - 98
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1592 KB)

    MULTIPLE-valued logic has been the object of much research over the last fifteen years. Since 1971, there has been an annual symposium devoted exclusively to the subject and, during that time, nearly 600 papers have appeared in its Proceedings. In addition, a large number of technical papers have appeared elsewhere together with a number of survey articles [1]-[4] and a number of textbooks [5]-[7]... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A Survey of Multivalued Memories

    Publication Year: 1986, Page(s):99 - 106
    Cited by:  Papers (30)  |  Patents (45)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2625 KB)

    Techniques of storing multiple bits of information in a single memory location are reviewed. Any of several states can be stored in ROM's by adjusting the threshold voltage or the size of a particular memory device. In dynamic RAM's, this can be achieved by varying the charge stored on the cell capacitor. The peripheral circuitry required to distinguish between the states stored in the memory area... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Uncertainty, Energy, and Multiple-Valued Logics

    Publication Year: 1986, Page(s):107 - 114
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2056 KB)

    The multiple-valued logics obtained by introducing uncertainty and energy considerations into classical switching theory are studied in this paper. First, the nature of uncertain or unknown signals is examined, and two general uncertainty types called U-values and P-values are identified. It is shown that multiple-valued logics composed of U/P-values can be systematically derived from 2-valued Boo... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Complexity Based on Partitioning of Boolean Circuits and their Relation to Multivalued Circuits

    Publication Year: 1986, Page(s):115 - 123
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2627 KB)

    We present a new complexity measure for Boolean functions based on partitions of combinatorial circuits into subcircuits, and give upper and lower bounds on the complexity for Boolean functions. Roughly speaking, for a function g whose range is the set of positive integers, g(n)-partition of a circuit is a partition of a circuit into subcircuits such that. 1) each subcircuit has at most g(n) outpu... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Synthesis of Multivalued Multithreshold Functions for CCD Implementation

    Publication Year: 1986, Page(s):124 - 133
    Cited by:  Papers (17)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2773 KB)

    Basic multivalued building blocks constructed using CCD (charge-coupled devices) technology are presented. They are used to realize simple threshold functions. Existing techniques for decomposition of multivalued multithreshold functions into simpler subfunctions are reviewed. Usage of the CCD technology in implementation of these subfunctions is discussed. Two new decomposition techniques are pro... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Heuristic Minimization of MVL Functions: A Direct Cover Approach

    Publication Year: 1986, Page(s):134 - 144
    Cited by:  Papers (34)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3165 KB)

    A heuristic method to obtain near-minimal covers of p-valued switching functions is introduced. First, we describe transform tools useful in the processing of MVL functions. They are: p-adic shifting, weighting, and implicant detecting transformations. Based on these tools, a direct cover algorithm is presented that uses local information for heuristic decision making. The heuristics are taken fro... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Representation of Uncertainty in Computer Vision Using Fuzzy Sets

    Publication Year: 1986, Page(s):145 - 156
    Cited by:  Papers (35)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (7399 KB)

    Uncertainty in computer vision can arise at various levels. It can occur in the low level in the raw sensor input, and extends all the way through intermediate and higher levels. Ideally, at any level where decisions are being made on the basis of previous processing steps, a computer vision system must have sufficient flexibility for representation of uncertainty in any of these levels. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Characteristics of Prototype CMOS Quaternary Logic Encoder-Decoder Circuits

    Publication Year: 1986, Page(s):157 - 161
    Cited by:  Papers (19)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4470 KB)

    The use of quaternary logic input and output signals for delivering information on and off chip could reduce the number of required package pins or increase the amount of information conveyed on a fixed number of package pins. In this correspondence, we discuss the performance of prototype CMOS binary-to-quaternary encoder and quaternary-to-binary decoder test circuits that have been realized on a... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • The Current Mode Fuzzy Logic Integrated Circuits Fabricated by the Standard CMOS Process

    Publication Year: 1986, Page(s):161 - 167
    Cited by:  Papers (124)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5597 KB)

    Nine basic fuzzy logic circuits employing p-ch and n-ch current mirrors are presented, and the fuzzy information processing hardware system design at a low cost with only one kind of master slice (semicustom fuzzy logic IC) is described. The fuzzy logic circuits presented here will be indispensable for a "fuzzy computer" in the near future. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Ternary Scan Design for VLSI Testability

    Publication Year: 1986, Page(s):167 - 170
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (801 KB)

    In this correspondence, a new scheme is proposed in which ternary clocking signals are used to replace binary clocking signals in VLSI scan-testing designs. This scheme has the same advantage of high testability as the binary scan method [1], but it eliminates the mode- selecting signal line. Since this mode-selecting line must be routed to each flip-flop in the binary scan scheme, the saving is s... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • On the Diagnosability of a General Model of System with Three-Valued Test Outcomes

    Publication Year: 1986, Page(s):170 - 173
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1011 KB)

    The problem of diagnosability of a system with three-valued test outcomes was considered in earlier works [1]-[3]. However all these works assume the system to be modeled as in [4]. In this correspondence, we consider a more general model of the system and study the diagnosability criteria in presence of three-valued test outcomes. In this model, each unit is tested jointly by a number of other un... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Iteration Properties of Multivalued Switching Functions

    Publication Year: 1986, Page(s):173 - 178
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1081 KB)

    The purpose of this correspondence is to survey the literature concerning the iterative properties of multivalued switching functions. These properties are important for the synthesis of switching circuits by cascades of simpler elements. Our presentation evolves around the graphs of transformations of finite sets. We discuss such topics as limitations of the computational capabilities of cascades... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Regular Ternary Logic Functions—Ternary Logic Functions Suitable for Treating Ambiguity

    Publication Year: 1986, Page(s):179 - 183
    Cited by:  Papers (59)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1096 KB)

    A special group of ternary functions, called regular ternary logic functions, are defined. These functions are useful in switching theory, programming languages, algorithm theory, and many other fields—if we are concerned with the indefinite state in such fields. This correspondence describes the fundamental properties and representations of the regular ternary logic functions. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Design of a Multiple-Valued Systolic System for the Computation of the Chrestenson Spectrum

    Publication Year: 1986, Page(s):183 - 188
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1096 KB)

    This correspondence deals with the computation of the Chrestenson spectrum of an n-ary, n-place, p-valued function by means of a systolic system. The design of a systolic system in a multiple-valued environment is discussed in details and some aspects are compared to binary realizations. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • IEEE Computer Society Publications

    Publication Year: 1986, Page(s): 188
    Request permission for commercial reuse | PDF file iconPDF (179 KB)
    Freely Available from IEEE
  • Information for authors

    Publication Year: 1986, Page(s): 188
    Request permission for commercial reuse | PDF file iconPDF (199 KB)
    Freely Available from IEEE

Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org