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IEEE Transactions on Computers

Issue 12 • Date Dec. 1986

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Displaying Results 1 - 17 of 17
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1986, Page(s): c1
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  • IEEE Computer Society

    Publication Year: 1986, Page(s): c2
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  • Group Properties of Cellular Automata and VLSI Applications

    Publication Year: 1986, Page(s):1013 - 1024
    Cited by:  Papers (77)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3394 KB)

    The study of one-dimensional cellular automata exhibiting group properties is presented. The results show that only a certain class of cellular automata rules exhibit group characteristics based on rule multiplication. However, many other of these automata reveal groups based on permutations of their global states. It is further shown how these groups may be utilized in the design of modulo arithm... View full abstract»

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  • The Load-Sharing Banyan Network

    Publication Year: 1986, Page(s):1025 - 1034
    Cited by:  Papers (30)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2978 KB)

    Banyan networks, as well as many other self-routing networks, have a simple and regular topology, and can be easily diagnosed and maintained. However, like many other self- routing networks, Banyan networks have only one path between each input and output pair. Failures of a single link or node will make many paths unavailable, and certain traffic patterns can cause severe congestion in the networ... View full abstract»

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  • Automatic Verification of Sequential Circuits Using Temporal Logic

    Publication Year: 1986, Page(s):1035 - 1044
    Cited by:  Papers (72)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3028 KB)

    Verifying the correctness of sequential circuits has been an important problem for a long time. But lack of any formal and efficient method of verification has prevented the creation of practical design aids for this purpose. Since all the known techniques of simulation and prototype testing are time consuming and not very reliable, there is an acute need for such tools. In this paper we describe ... View full abstract»

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  • Analytic Queueing Network Models for Parallel Processing of Task Systems

    Publication Year: 1986, Page(s):1045 - 1054
    Cited by:  Papers (48)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3313 KB)

    This paper is concerned with the performance evaluation of a realistic model of parallel computations. We present an efficient algorithm to determine the mean completion time and related performance measures for a task system: a set of tasks with precedence relationships in their execution sequence, such that the resulting graph is acyclic. A queueing network (QN) is used to model tasks executing ... View full abstract»

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  • An Array Layout Methodology for VLSI Circuits

    Publication Year: 1986, Page(s):1055 - 1067
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (6724 KB)

    A new methodology for the layout design of several classes of useful VLSI structures is proposed. The approach produces a structured layout for commonly found computation structures, using regular elements called layout slices. Algorithms for optimal array realization are described that offer several significant advantages over existing layout schemes. Any network that can be decomposed into insta... View full abstract»

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  • Multiple Stuck-Fault Detection and Location in Multivalued Linear Circuits

    Publication Year: 1986, Page(s):1068 - 1071
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (763 KB)

    In this correspondence, we present procedures for constructing universal fault detection test sets as well as fault location test sets for multivalued linear circuits, under a multiple stuck-fault model. The bin packing problem is involved in the procedures. The sizes of the fault detection test set and the fault location test set constructed for an n- variable v-valued linear tree circuit are 1 +... View full abstract»

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  • A Special-Function Unit for Sorting and Sort-Based Database Operations

    Publication Year: 1986, Page(s):1071 - 1077
    Cited by:  Papers (8)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1561 KB)

    Achieving efficiency in database management functions is a fundamental problem underlying many computer applications. Efficiency is difficult to achieve using the traditional general-purpose von Neumann processors. Recent advances in microelectronic technologies have prompted many new research activities in the design, implementation, and application of database machines which are tailored for pro... View full abstract»

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  • Performance Analysis of a Database Filter Search Hardware

    Publication Year: 1986, Page(s):1077 - 1082
    Cited by:  Papers (8)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1164 KB)

    Several hardware algorithms to search for a large number of keys in a database are presented. These algorithms allow some false matches but guarantee hits for the desired search keys. This imperfectness allows us to design a variety of simple hardware searchers by using only RAM's and shift registers. Analytic models are developed to compare the performances of these hardware devices. Applications... View full abstract»

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  • On the Diagnosis of System Faults with Propagation

    Publication Year: 1986, Page(s):1082 - 1086
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1070 KB)

    This correspondence proposes a new fault model for system diagnosis, wherein the interaction among faulty subsystems and fault propagation is considered. Criteria for one-step diagnosability are given. Optimal design of diagnosable systems is also developed. As to sequential diagnosis, single-loop systems are studied in depth. View full abstract»

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  • Linear Dependencies in Linear Feedback Shift Registers

    Publication Year: 1986, Page(s):1086 - 1088
    Cited by:  Papers (47)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (714 KB)

    Linear feedback shift registers have been proposed to generate test patterns for the self-test of logic networks. The probability of linear dependence among k bit positions of a subset of k bits in a maximum length shift register sequence is an outstanding problem. In this correspondence, we derive a formula for the calculation of the probability. View full abstract»

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  • Spectral Signature Testing of Multiple Stuck-at Faults in Irredundant Combinational Networks

    Publication Year: 1986, Page(s):1088 - 1092
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1127 KB)

    Earlier spectral signature testing methods are extended to the multiple stuck-at fault model. The testability condition for multiple- input faults is established and a minimal spanning signature (MSS) is defined to cover all these faults. It is then shown that an MSS, which in most cases contains a single spectral coefficient, will detect over 99 percent of all input and internal multiple faults. ... View full abstract»

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  • 1986 Index IEEE Transactions on Computers Vol. C-35

    Publication Year: 1986, Page(s):1093 - 1102
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  • The One Leveraged Investment With a Guaranteed Return

    Publication Year: 1986, Page(s): 1103
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  • IEEE Computer Society Publications

    Publication Year: 1986, Page(s): 1103
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  • Information for authors

    Publication Year: 1986, Page(s): 1103
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org