IEEE Transactions on Computers

Issue 6 • June 1983

Filter Results

Displaying Results 1 - 18 of 18
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1983, Page(s): c1
    Request permission for commercial reuse | PDF file iconPDF (414 KB)
    Freely Available from IEEE
  • IEEE Computer Society Publications

    Publication Year: 1983, Page(s): c2
    Request permission for commercial reuse | PDF file iconPDF (184 KB)
    Freely Available from IEEE
  • A Minimum Table Size Result for Higher Radix Nonrestoring Division

    Publication Year: 1983, Page(s):521 - 526
    Cited by:  Papers (7)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2174 KB)

    The minimum table size is established for nonrestoring division algorithms that utilize a table lookup technique for quotient digit selection. It is assumed that the dividend and divisor are n-bit fractions, that the algorithm is radix 2q, q ≥ 2, and that the algorithm uses the table on an iteration in which any remainder in the range 0 to 1/2 – 1/2n+1can occur as... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Sign/Logarithm Arithmetic for FFT Implementation

    Publication Year: 1983, Page(s):526 - 534
    Cited by:  Papers (81)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3806 KB)

    Sign/logarithm arithmetic is applicable to a variety of numerical applications where wide dynamic range and small wordsize are required. In this paper the basic sign/logarithm arithmetic operations required for signal processing (i.e., addition, subtraction, and multiplication) are reviewed, the computational errors are analyzed for FFT realization, and simulation results are presented which serve... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Code Constructions for Error Control in Byte Organized Memory Systems

    Publication Year: 1983, Page(s):535 - 542
    Cited by:  Papers (16)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2518 KB)

    Error correcting codes, such as Hamming codes, have been used successfully to correct errors arising from failures in computer memories. Failure of a chip or card can cause errors which exceed the capabilities of these codes. We construct codes which detect any byte error and correct such errors if they are single random errors. A subclass of the codes developed is shown to have the additional cap... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Abstractions for Node Level Passive Fault Detection in Distributed Systems

    Publication Year: 1983, Page(s):543 - 550
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2395 KB)

    We introduce a scheme for passive node-level fault detection in a distributed system. With each system node associate a low-cost, low-complexity observer which monitors the pattern of incoming and outgoing messages and compares it against an abstracted model of the node's behavior. We develop a fault detection procedure, which is probabilistic because of nondeterminism in the simplified node model... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays

    Publication Year: 1983, Page(s):551 - 557
    Cited by:  Papers (19)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1373 KB)

    In this paper, the validity of single fault assumption in deriving diagnostic test sets is examined with respect to crosspoint faults in programmable logic arrays (PLA's). The control input procedure developed here can be used to convert PLA's having undetectable crosspoint faults to crosspoint-irredundant PLA's for testing purposes. All crosspoints will be testable in crosspoint-irredundant PLA's... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Experiments in Automatic Microcode Generation

    Publication Year: 1983, Page(s):557 - 569
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3672 KB)

    A procedure is described which permits applications problems coded in a higher level language to be compiled to microcode for horizontally microprogrammed processors. An experimental language has been designed which is suitable for expressing computationally oriented problems for such processors in a distributed processing environment. Source programs are compiled first to a machine independent in... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Efficient VLSI Networks for Parallel Processing Based on Orthogonal Trees

    Publication Year: 1983, Page(s):569 - 581
    Cited by:  Papers (73)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4702 KB)

    In this paper we describe two interconnection networks for parallel processing, namely the orthogonal trees network and the orthogonal tree cycles (OTN and OTC). Both networks are suitable for VISI implementation and have been analyzed using Thompson's model of VLSI. While the OTN and OTC have time performances similar to fast networks such as the perfect shuffle network (PSN), the cube comnected ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Divide-and-Conquer for Parallel Processing

    Publication Year: 1983, Page(s):582 - 585
    Cited by:  Papers (32)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1005 KB)

    The well known divide-and-conquer paradigm has proved to be useful for deriving efficient algorithms for many problems. Several researchers have pointed out its usefulness for parallel processing; however, the problem of analyzing such parallel algorithms in a realistic setting has been largely overlooked. In this paper a realistic model for divide-and-conquer based algorithms is postulated; the e... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Time-Space Tradeoffs on Back-to-Back FFT Algorithms

    Publication Year: 1983, Page(s):585 - 589
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1027 KB)

    This paper examines the performance of back-to-back applications of a fast Fourier transform algorithm with respect to computational time and space. Using a well-known pebble game as an analysis technique, a lower bound is derived on the product of time and space, which is of the form T · S = Ω(n2 log2n) for an n-input back-to-back FFT. The implications of this lower bound on application... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Sign Detection and Implicit-Explicit Conversion of Numbers in Residue Arithmetic

    Publication Year: 1983, Page(s):590 - 594
    Cited by:  Papers (9)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1088 KB)

    A new method of sign detection is proposed. The advantage of this method is a possibility of simultaneous execution of two operations: residue to mixed-radix conversion of the number magnitude and sign detection in one and the same circuit (implicit-explicit conversion). View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A Simple Random Test Procedure for Detection of Single Intermittent Fault in Combinational Circuits

    Publication Year: 1983, Page(s):594 - 597
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (711 KB)

    This paper suggests a method for near-optimal selection of input vector probabilities for random testing of intermittent faults in combinational circuits. The assignment of input vector probabilities is obtained by equalizing the quality factors of all test vectors in a simple way. It is shown that the degree of fault detection is comparable with that of Savir [2]. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • The Reliability of Periodically Repaired n − I/n Parallel Redundant Systems

    Publication Year: 1983, Page(s):597 - 598
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (233 KB)

    The average failure rate of an n − 1/n parallel redundant system of n identical elements, each of which has a constant failure rate of λ, that is repaired every T hours can be approximated by the upper bound n(n − 1)λ2T/2. If λT < 1, the ratio of the upper bound to the actual average failure rate is less than or equal to I + (n −)λT/I − ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Call for Papers

    Publication Year: 1983, Page(s): 598
    Request permission for commercial reuse | PDF file iconPDF (116 KB)
    Freely Available from IEEE
  • Call for Papers Special Issue on Reliable and Fault-Tolerant Computing

    Publication Year: 1983, Page(s): 598
    Request permission for commercial reuse | PDF file iconPDF (63 KB)
    Freely Available from IEEE
  • IEEE Computer Society

    Publication Year: 1983, Page(s): 598
    Request permission for commercial reuse | PDF file iconPDF (281 KB)
    Freely Available from IEEE
  • Call for Papers

    Publication Year: 1983, Page(s): 598
    Request permission for commercial reuse | PDF file iconPDF (188 KB)
    Freely Available from IEEE

Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org