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IEEE Transactions on Computers

Issue 5 • May 1983

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  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1983, Page(s): c1
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  • IEEE Computer Society

    Publication Year: 1983, Page(s): c2
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  • The Piecewise Data Flow Architecture: Architectural Concepts

    Publication Year: 1983, Page(s):425 - 438
    Cited by:  Papers (6)  |  Patents (24)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4267 KB)

    This paper presents the design and a brief analysis of the Piecewise Data Flow computer (PDF), an architecture proposed for very high-performance computing. PDF is a heterogeneous multiprocessor system having both SIMD and MIMD characteristics. Each computation is translated into a control flow graph in which each node contains a basic block of instructions. Concurrency can be exploited in three d... View full abstract»

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  • An On-Line Algorithm for the Location of Cross Point Faults in Programmable Logic Arrays

    Publication Year: 1983, Page(s):438 - 444
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3870 KB)

    An on-line algorithm is developed for the location of single cross point faults in a PLA (FPLA). The main feature of the algorithm is the determination of a fault set corresponding to the response obtained for a failed test. For the apparently small number of faults in this set, all other tests are generated and a fault table is formed. Subsequently, an adaptive procedure is used to diagnose the f... View full abstract»

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  • Invariant Properties of the Shuffle-Exchange and a Simplified Cost-Effective Version of the Omega Network

    Publication Year: 1983, Page(s):444 - 450
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3609 KB)

    Let Ω denote the set of permutations performable by a pass through the Omega network (an n-stage shuffle-exchange network), and let π denote an arbitrary permutation of N = 2n elements. In this paper we characterize the sets {π|πΩ = Ω} (called left invariants) and {π|Ωπ = Ω} (called right invariants). This characterization provides a useful criteri... View full abstract»

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  • Models of DASD Subsystems with Multiple Access Paths: A Throughput-Driven Approach

    Publication Year: 1983, Page(s):451 - 463
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3620 KB)

    A throughput-driven approach to the performance analysis of direct access storage devices (DASD's), i.e., disks, is presented for a model of a block-multiplexor channel system with multiple transfer paths. The approach relies on a step-wise analysis of shared components within the data transfer path: head of string, control unit, channel, referred to as blocking points. In order to derive the serv... View full abstract»

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  • Design of Totally Self-Checking Circuits with an Unrestricted Stuck-At Fault-Set Using Redundancy in Space and Time Domains

    Publication Year: 1983, Page(s):464 - 475
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3277 KB)

    All the totally self checking (TSC) circuits known so far [3]-[8] restrict their fault sets to either single or multiple but unidirectional stuck-at faults. Meyer and Sundstrom [20] have considered on line diagnosis of unrestricted faults but the class of circuits proposed by them does not fall under the category of TSC circuits. This paper proposes a new type of circuit model which is TSC for a f... View full abstract»

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  • An Instruction Set for Evaluating Expressions

    Publication Year: 1983, Page(s):476 - 478
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (712 KB)

    A stack-based instruction set which includes two-operand, one-operand and zero-operand instructions is proposed, and is shown to produce a more compact code and fewer instructions for evaluating assignment statements than one-operand and zero-operand stack instruction sets. If this instruction set is then extended to include two-operand memory-to-memory instructions, the combined instruction set a... View full abstract»

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  • A Hierarchical Description Model for Microcode

    Publication Year: 1983, Page(s):478 - 487
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1539 KB)

    In the paper, a structured and formal way to define microcode and to model a microprogrammed machine in terms of microoperations and their collection in microinstructions is proposed. It is characterized particularly by the hierarchical subdivision of microcode modeling, associated with the introduction of proper formalism to describe each level and the representation of both hardware timing and r... View full abstract»

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  • A Method for the Generation and Processing of Dyadic Indexed Data

    Publication Year: 1983, Page(s):487 - 494
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1461 KB)

    The elements of an array of 2n data are indexed so that adjacent elements have Hamming distance 1. Based on this indexing a class of invertible fast in-place transformations is developed. The transform coefficients depend on the Hamming distance between the indexes of input data. A class of similar transformations exists in the Walsh-Hadamard domain. Three transform operations are discussed in det... View full abstract»

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  • Near-Perfect Codes for Binary-Coded Radix-r Arithmetic Units

    Publication Year: 1983, Page(s):494 - 497
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (781 KB)

    This paper considers AN arithmetic codes with radix r > 2 and binary-coded digits (BCr) using weights. The error-correcting capability of the AN codes is single bit within any BCr digit, that is, the corrected errors are of the form ± wirj where wi are the weights of the BCr code. The paper characterizes a class of AN codes having a generator of the form A = r · p where r|r − 1 ... View full abstract»

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  • A Computer Algorithm for Calculating the Product AB Modulo M

    Publication Year: 1983, Page(s):497 - 500
    Cited by:  Papers (78)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (509 KB)

    It is possible to find the smallest nonnegative integer R congruent modulo M to the product AB of two nonnegative integers without dividing by M. In multiple precision arithmetic, doing away with the division cuts the calculation time by varying amounts, depending on machine architecture. It also cuts storage space. View full abstract»

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  • An Overflow-Free Residue Multiplier

    Publication Year: 1983, Page(s):501 - 504
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (653 KB)

    Residue arithmetic is receiving increased attention due to its ability to support very high-speed parallel arithmetic. However, dynamic range overflow remains a serious problem. Contemporary overflow management schemes rely on inefficient scaling algorithms. In this paper, an overflow-inhibiting residue multiplier is architected and tested. The system makes use the popularthree moduliset{2n −... View full abstract»

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  • Single Residue Error Correction in Residue Number Systems

    Publication Year: 1983, Page(s):504 - 507
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (897 KB)

    We present a new method to correct single errors in an n-residue number system through the use of r redundant moduli. The method requires ⌈2n/r⌉ + 2 recombinations of n residues in the worst case. This is of lower complexity than any other known method. View full abstract»

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  • Fast and Efficient Totally Self-Checking Checkers for m-out-of-(2m ± 1) Codes

    Publication Year: 1983, Page(s):507 - 511
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (984 KB)

    This note is concerned with the design of fast totally self-checking checkers for m-out-of-(2m ± 1) codes. The new method uses only three levels of gates, and is based on the partitioning of the input lines into m blocks of two lines per block except for the last block. A first level of two-input AND and OR gates realizes the majority functions T(ki ≥ 1) and T(ki ≥ 2). These are c... View full abstract»

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  • Comments on "Detection and Location of Input and Feedback Bridging Faults Among Input and Output Lines"

    Publication Year: 1983, Page(s):511 - 512
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (486 KB)

    Theorem 2ii), Theorem 7, and Corollary 5ii) with respect to detection and location of feedback bridging faults in the above paper1 are shown to be incorrect by counterexamples. In addition, some misunderstandings about asynchronous behavior of a faulty network with a feedback bridging are pointed out. View full abstract»

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  • On the Connectivity of Some Telecommunications Networks

    Publication Year: 1983, Page(s):512 - 519
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (662 KB)

    Memmi and Raillard constructed two families of graphs, regular of degree d and diameter k which are useful for designing telecommunications networks ([(d, k) graph problem]). They conjectured that the connectivity of these graphs were equal to their degree. We prove here these conjectures, that implies that the networks have the best possible reliability. View full abstract»

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  • IEEE Transactions on Computers Planned Special Issues

    Publication Year: 1983, Page(s): 520
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  • IEEE Computer Society Publications

    Publication Year: 1983, Page(s): 520
    Request permission for commercial reuse | PDF file iconPDF (189 KB)
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  • Call for Papers

    Publication Year: 1983, Page(s): 520
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org