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IEEE Transactions on Computers

Issue 4 • Date April 1983

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Displaying Results 1 - 21 of 21
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1983, Page(s): c1
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  • IEEE Computer Society

    Publication Year: 1983, Page(s): c2
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  • Introduction: Computer Arithmetic

    Publication Year: 1983, Page(s):329 - 330
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1697 KB)

    SINCE the inception of electronic computers, much effort has been directed towards the search of faster arithmetic techniques. For all scientific computations, the arithmetic units have always been considered as the heart of a digital computer. In the earlier approaches, emphasis on the arithmetic elements was limited to integer arithmetic with limited precision, as the cost of discrete components... View full abstract»

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  • On the Conversion of Hensel Codes to Farey Rationals

    Publication Year: 1983, Page(s):331 - 337
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2333 KB)

    Three different algorithms are described for the conversion of Hensel codes to Farey rationals. The first algorithm is based on the trial and error factorization of the weight of a Hensel code, inversion and range test. The second algorithm is deterministic and uses a pair of different p-adic systems for simultaneous computation; from the resulting weights of the two different Hensel codes of the ... View full abstract»

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  • Error Free Computation: A Direct Method to Convert Finite-Segment p-Adic Numbers into Rational Numbers

    Publication Year: 1983, Page(s):337 - 343
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3143 KB)

    Elements of finite-segment p-adic arithmetic are briefly recalled, and a new direct method to convert finite-segment p-adic numbers into rational numbers is described. View full abstract»

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  • A Simple Approach to the Error Analysis of Division-Free Numerical Algorithms

    Publication Year: 1983, Page(s):343 - 351
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3501 KB)

    A simple approach is described for the error analysis of division-free algorithms. Applications to the comparison of algorithms for extended sums, products, real polynomial evaluation, complex polynomial evaluation are also given. View full abstract»

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  • Error Analysis of Certain Floating-Point On-Line Algorithms

    Publication Year: 1983, Page(s):352 - 358
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2284 KB)

    The properties of redundant number system in significand (mantissa) representation are studied and the range of redundant significand is derived. From the range of the redundant significand and the absolute error of on-line operations, the MRRE (maximum relative representation error) is defined and analyzed for floating-point on-line addition and multiplication. View full abstract»

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  • A Basis for the Quantitative Comparison of Computer Number Systems

    Publication Year: 1983, Page(s):359 - 369
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2711 KB)

    This paper describes aspects of an arithmetic design system (ADS) to support the quantitative evaluation of alternate number systems with respect to a given application and realization technology. In computer arithmetic we are concerned with establishing a correspondence between abstract quantities (numbers) and some physical representation (symbols), and with simulating the operations on these sy... View full abstract»

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  • CADAC: A Controlled-Precision Decimal Arithmetic Unit

    Publication Year: 1983, Page(s):370 - 377
    Cited by:  Papers (31)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2887 KB)

    This paper describes the design of an arithmetic unit called CADAC (clean arithmetic with decimal base and controlled precision). Programming language specifications for carrying out "ideal" floating-point arithmetic are described first. These specifications include detailed requirements for dynamic precision control and exception handling, along with both complex and interval arithmetic at the le... View full abstract»

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  • Finite Precision Rational Arithmetic: An Arithmetic Unit

    Publication Year: 1983, Page(s):378 - 388
    Cited by:  Papers (17)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4361 KB)

    The foundations of an arithmetic unit performing the add, subtract, multiply, and divide operations on rational operands are developed. The unit uses the classical Euclidean algorithm as one unified algorithm for all the arithmetic operations, including rounding. Binary implementations are discussed, based on techniques known from SRT division, and utilizing ripple-free borrow-save and carry-save ... View full abstract»

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  • The Design of Error Checkers for Self-Checking Residue Number Arithmetic

    Publication Year: 1983, Page(s):388 - 396
    Cited by:  Papers (47)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4156 KB)

    During the last few years residue number (RNS) arithmetic has gained increasing importance for providing high speed fault tolerant performance in dedicated digital signal processors. One factor that has limited the use of redundant RNS theory in practice is the hardware complexity of the error checker. This paper presents a mathematical analysis of the error correction algorithm which suggests a n... View full abstract»

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  • Fast Iterative Division of p-adic Numbers

    Publication Year: 1983, Page(s):396 - 398
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1781 KB)

    A fast iterative scheme based on the Newton method is described for finding the reciprocal of a finite segment p-adic numbers (Hensel code). The rate of generation of the reciprocal digits per step can be made quadratic or higher order by a proper choice of the starting value and the iterating function. The extension of this method to find the inverse transform of the Hensel code of a rational pol... View full abstract»

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  • A Fully Parallel Mixed-Radix Conversion Algorithm for Residue Number Applications

    Publication Year: 1983, Page(s):398 - 402
    Cited by:  Papers (40)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (935 KB)

    A new, fully parallel mixed-radix conversion (MRC) algorithm which utilizes the maximum parallelism that exists in the residues (RNS) to mixed-radix (MR) digits conversion to achieve high throughput rate and very short conversion time is presented. The new algorithm has a conversion time of two table look-up cycles for moduli sets consisting of up to 15 moduli. As a comparison, the classical Szabo... View full abstract»

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  • Fully Digit On-Line Networks

    Publication Year: 1983, Page(s):402 - 406
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1169 KB)

    Research in computer architecture in the last decade has been driven largely by the motivation to overcome the "von Neumann" bottleneck. This paper describes the design and use of one such architecture—fully digit on-line networks. First, digit on-line algorithms and processing are defined. The key advantage to digit on-line processing is that it allows a digit serial, most significant digit... View full abstract»

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  • Techniques to Reduce the Inherent Limitations of Fully Digit On-Line Arithmetic

    Publication Year: 1983, Page(s):406 - 411
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1439 KB)

    A fully digit on-line arithmetic unit generates at least the i most (least) significant digits of the output after having been supplied no more than the (i + k) most (least) significant digits of each input, where k is some small constant. This digit serial property can be used to reduce the aggregate fill and flush times of a chained list of digit on-line arithmetic units (which in turn reduces t... View full abstract»

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  • The Use of Floating-Point and Interval Arithmetic in the Computation of Error Bounds

    Publication Year: 1983, Page(s):411 - 417
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1659 KB)

    Three forms of interval floating-point arithmetic are defined in terms of absolute precision, relative precision, and combined absolute and relative precision. The absolute-precision form corresponds to the centered form of conventional rounded-interval arithmetic. The three forms are compared on the basis of the number of floating-point operations needed to generate error bounds for inner-product... View full abstract»

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  • Concurrent Error Detection in Multiply and Divide Arrays

    Publication Year: 1983, Page(s):417 - 422
    Cited by:  Papers (38)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1154 KB)

    A method proposed for concurrent error detection in ALU's is used in the design of multiplier and divider arrays. This method, called recomputing with shifted operands (RESO), can detect all errors caused by failures confined to a cell of the cellular array. The assumption that the failures are confined to a small area of an integrated circuit and the precise nature of the failures is not known is... View full abstract»

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  • Call for Papers

    Publication Year: 1983, Page(s): 422
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  • Call for Papers 4th Jerusalem Conference on Information Technology (JCIT)

    Publication Year: 1983, Page(s): 422
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  • IEEE Computer Society Publications

    Publication Year: 1983, Page(s): 422
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  • Call for Papers

    Publication Year: 1983, Page(s): 422
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org