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IEEE Transactions on Computers

Issue 3 • Date March 1983

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Displaying Results 1 - 19 of 19
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1983, Page(s): c1
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    Freely Available from IEEE
  • IEEE Computer Society

    Publication Year: 1983, Page(s): c2
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  • Single Row Routing

    Publication Year: 1983, Page(s):209 - 220
    Cited by:  Papers (25)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3192 KB)

    The automated design of multilayer printed circuit boards is of great importance in the physical design of complex electronic systems. Wire routing is a crucial step in the design process. In this paper, the single row routing problem is considered. First, we discuss the relevance of single row routing in the context of the general routing problem. Then, we show that relaxing the restriction that ... View full abstract»

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  • The Isomorphism of Simple File Allocation

    Publication Year: 1983, Page(s):221 - 232
    Cited by:  Papers (21)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3311 KB)

    In this paper, we show that the simple file allocation problem in computer science is isomorphic to the single commodity warehouse location problem in operations research. In simple file allocation, costs due to query and update accesses and storage are considered. Design requirements such as reliability, availability, and delay are not taken into account. Due to this isomorphism, many techniques ... View full abstract»

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  • File Allocation in a Distributed Computer Communication Network

    Publication Year: 1983, Page(s):232 - 244
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5176 KB)

    An algorithm is presented to determine locations for the storage of copies of files in store-and-forward computer communications networks. The algorithm determines storage locations which minimize the sum of network file storage costs and message transmission costs. Networks that use adaptive routing techniques are the primary focus. Feasible file locations must satisfy network performance require... View full abstract»

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  • A Quantization Approximation for Modeling Computer Network Nodal Queueing Delay

    Publication Year: 1983, Page(s):245 - 253
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2826 KB)

    A new approximation model for the analysis of a finite buffer GI/G/1 system is presented. The approach consists of formulating the computer node mean waiting time from a discrete time marginal overflow customer per time slot solution of a continuous marginal overflow time per customer solution. The key to the model solution is the quantization of the distribution (fu(u)) of the difference between ... View full abstract»

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  • An Efficient Implementation of Batcher's Odd-Even Merge Algorithm and Its Application in Parallel Sorting Schemes

    Publication Year: 1983, Page(s):254 - 264
    Cited by:  Papers (21)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2922 KB)

    An algorithm is presented to merge two subfiles of size n/2 each, stored in the left and the right halves of a linearly connected processor array, in 3n/2 route steps and log n compare-exchange steps. This algorithm is extended to merge two horizontally adjacent subfiles of size m × n/2 each, stored in an m × n mesh-connected processor array in row-major order, in m + 2n route steps and ... View full abstract»

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  • An Efficient Parallel Algorithm for the Solution of Large Sparse Linear Matrix Equations

    Publication Year: 1983, Page(s):265 - 273
    Cited by:  Papers (8)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2901 KB)

    An algorithm for the parallel solution of large sparse sets of linear equations, given their factor matrices, is developed. It is aimed at efficient practical implementation on a processor of the multiple instruction multiple data stream (MIMD) type. The software required to implement the algorithm is described. In addition, the amount of memory necessary for data retention during execution is con... View full abstract»

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  • A New Design Method for m-Out-of-n TSC Checkers

    Publication Year: 1983, Page(s):273 - 283
    Cited by:  Papers (26)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4145 KB)

    The paper presents a new method for designing efficient TSC checkers for m-out-of n codes. The method is based on the partitioning of the input code variables into an arbitrary number of r classes. The paper establishes the necessary design conditions that must hold among m, n and r. The checker is basically composed of an m/n to l/z subchecker concatenated with an l/z to 1/2 subchecker. A cost an... View full abstract»

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  • Asynchronous and Clocked Control Structures for VSLI Based Interconnection Networks

    Publication Year: 1983, Page(s):284 - 293
    Cited by:  Papers (43)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3232 KB)

    A central issue in the design of multiprocessor systems is the interconnection network which provides communication paths between the processors. For large systems, high bandwidth interconnection networks will require numerous "network chips" with each chip implementing some subnetwork of the original larger network. Modularity and growth are important properties for such networks since multiproce... View full abstract»

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  • A Combinatorial Limit to the Computing Power of VLSI Circuits

    Publication Year: 1983, Page(s):294 - 300
    Cited by:  Papers (30)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2561 KB)

    We introduce a property of Boolean functions, called transitivity which consists of integer, polynomial, and matrix products as well as of many interesting related computational problems. We show that the area of any circuit computing a transitive function grows quadratically with the circuit's maximum data rate, expressed in bits/S. This result provides a precise analytic expression of an area-ti... View full abstract»

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  • A Parallel-Pipeline Architecture of the Fast Polynomial Transform for Computing a Two-Dimensional Cyclic Convolution

    Publication Year: 1983, Page(s):301 - 306
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (826 KB)

    In this paper, a parallel-pipeline, radix-2 architecture is proposed to implement the fast polynomial transform (FPT). It is shown that such a structure can be used to efficiently compute a two-dimensional convolution of d1× d2complex number points, where d1 = 2m-r+1and d2= 2mfor 1 ≤ r ≤ m. View full abstract»

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  • Binary Trees and Parallel Scheduling Algorithms

    Publication Year: 1983, Page(s):307 - 315
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1997 KB)

    This paper examines the use of binary trees in the design of efficient parallel algorithms. Using binary trees, we develop efficient algorithms for several scheduling problems. The shared memory model for parallel computation is used. Our success in using binary trees for parallel computations, indicates that the binary tree is an important and useful design tool for parallel algorithms. View full abstract»

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  • A Tree Representation of Combinational Networks

    Publication Year: 1983, Page(s):315 - 319
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1129 KB)

    A tree representation of a combinational network is developed. An algorithm is proposed for finding the functional expression realized by the network. The tree representation has storage requirement linear with respect to the number of input-output paths in the network. It is shown that rmding the complementary function and generating network SPOOF can be performed efficiently on the tree structur... View full abstract»

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  • Sequential Network Design Using Extra Inputs for Fault Detection

    Publication Year: 1983, Page(s):319 - 323
    Cited by:  Papers (12)
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  • On a Novel Approach of Fault Detection in an Easily Testable Sequential Machine with Extra Inputs and Extra Outputs

    Publication Year: 1983, Page(s):323 - 325
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (759 KB)

    By augmenting a given sequential machine M with two extra input symbols Ie1 and Ie2 and with one extra output terminal Z', a method is developed in this paper for designing an efficient checking experiment for the machine M and for its fault diagnosis to cover the types of faults which may result in an increase in the number of states of the original machine M. The method is an extension of the wo... View full abstract»

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  • Error-Correcting Codes in Binary-Coded Radix-r Arithmetic

    Publication Year: 1983, Page(s):326 - 328
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (589 KB)

    This paper presents a new class of AN codes of high efficiency capable of correcting single errors in radix-r arithmetic with the binary coded digits—BCr—system. The errors corrected within a single radix-r digit are single errors of the binary digits with weight ±wi≤ r–1,i=1,2,···, m, which are used to encode the BCr digits. The corresponding... View full abstract»

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  • IEEE Computer Society Publications

    Publication Year: 1983, Page(s): 328
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    Freely Available from IEEE
  • Call for Papers

    Publication Year: 1983, Page(s): 328
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org