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IEEE Transactions on Computers

Issue 5 • Date May 1982

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Displaying Results 1 - 18 of 18
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1982, Page(s): c1
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  • IEEE Computer Society

    Publication Year: 1982, Page(s): c2
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  • Supersystems: Current State-of-the-Art Guest Editor's Introduction

    Publication Year: 1982, Page(s):345 - 348
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2013 KB)

    CURRENT technological progress has led to the sharp upward movement of the upper bound of computerization that is specified by the most complex processes that can be cost-effectively computerized. Computer systems that may compute such processes with due regard to their computational requirements are now called Supersystems. View full abstract»

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  • Technology and Design Tradeoffs in the Creation of a Modern Supercomputer

    Publication Year: 1982, Page(s):349 - 362
    Cited by:  Papers (17)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (6508 KB)

    Supercomputers, which derive their title from the relative power they possess in any given period of computer life cycle, possess certain qualities which make their creation unique in the general milieu of computational engines. The interaction of technology, architecture, manufacturing, and user demands gives rise to compromises and design decisions which challenge the supercomputer developer. Th... View full abstract»

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  • The Burroughs Scientific Processor (BSP)

    Publication Year: 1982, Page(s):363 - 376
    Cited by:  Papers (42)  |  Patents (28)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3847 KB)

    The Burroughs Scientific Processor (BSP), a high-performance computer system, performed the Department of Energy LLL loops at roughly the speed of the CRAY-1. The BSP combined parallelism and pipelining, performing memory-to-memory operations. Seventeen memory units and two crossbar switch data alignment networks provided conflict-free access to most indexed arrays. Fast linear recurrence algorith... View full abstract»

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  • Bit-Serial Parallel Processing Systems

    Publication Year: 1982, Page(s):377 - 384
    Cited by:  Papers (44)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2945 KB)

    About a decade ago, a bit-serial parallel processing system STARAN®1 was developed. It used standard integrated circuits that were available at that time. Now, with the availability of VLSI, a much greater processing capability can be packed in a unit volume. This has led to the recent development of two bit-serial parallel processing systems: an airborne associative processor and a ground ba... View full abstract»

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  • A Modular Approach to Real-Time Supersystems

    Publication Year: 1982, Page(s):385 - 398
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4652 KB)

    This paper will present a description of the concepts, hardware modules, and architectures developed to allow the configuration of supersystems meeting the challenge of real-time embedded systems such as those required for missile and space borne defense applications. View full abstract»

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  • Supersystems: Technology and Architecture

    Publication Year: 1982, Page(s):399 - 409
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3525 KB)

    Supersystems are general purpose computers achieving throughputs in excess of 1 billion instructions per second (BIPS). As such, supersystems present formidable design challenges in the areas of technology and architecture. This paper examines three of the classical design options: high-speed monoprocessors, array processors, and distributed processors. The latter approach appears most desirable f... View full abstract»

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  • A Multicriteria Approach to Supersystem Architecture Definition

    Publication Year: 1982, Page(s):410 - 418
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2606 KB)

    The concept of large-scale, distributed computing or supersystems is still relatively new and, as experience is gained in the actual design of such systems, it has become increasingly obvious that: 1) the planning and design of a "good" supersystem is inherently far more complex than in the case of conventional systems; and 2) the truly optimal design of such systems can proceed only when all the ... View full abstract»

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  • A Methodology for the Design of Communication Networks and the Distribution of Data in Distributed Supercomputer Systems

    Publication Year: 1982, Page(s):419 - 434
    Cited by:  Papers (19)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2953 KB)

    In this paper the combined problem of communication network design and file allocation is studied for supercomputer networks. The network topology is restricted to be maximally connected and of minimal diameter in order to enhance network reliability as well as to reduce communication cost and delay. View full abstract»

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  • The Prime Memory System for Array Access

    Publication Year: 1982, Page(s):435 - 442
    Cited by:  Papers (74)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2603 KB)

    In this paper we describe a memory system designed for parallel array access. The system is based on the use of a prime nwnber of memories and a powerful combination of indexing hardware and data alignment switches. Particular emphasis is placed on the indexing equations and their implementation. View full abstract»

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  • The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems

    Publication Year: 1982, Page(s):443 - 454
    Cited by:  Papers (108)  |  Patents (25)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3638 KB)

    The Extra Stage Cube (ESC) interconnection network, a fault-tolerant structure, is proposed for use in large-scale parallel and distributed supercomputer systems. It has all of the interconnecting capabilities of the multistage cube-type networks that have been proposed for many supersystems. The ESC is derived from the Generalized Cube network by the addition of one stage of interchange boxes and... View full abstract»

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  • MP/C: A Multiprocessor/Computer Architecture

    Publication Year: 1982, Page(s):455 - 473
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4930 KB)

    A computer architecture for concurrent computing is proposed which has the shared memory aspect of tightly coupled multiprocessor systems and also the connection simplicity associated with message-connected, loosely-coupled multicomputer systems. A large address space is dynamically partitioned into contiguous segments that can be accessed by a single processor. The partitioning is accomplished by... View full abstract»

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  • IEEE Transactions on Computers Planned Special Issues

    Publication Year: 1982, Page(s): 474
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  • Call for Papers

    Publication Year: 1982, Page(s): 474
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  • IEEE Computer Society Press Checklist of New Titles December 1982

    Publication Year: 1982, Page(s): 474
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  • IEEE Computer Society Publications

    Publication Year: 1982, Page(s): 474
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  • Innovation

    Publication Year: 1982, Page(s): 474
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org