IEEE Transactions on Computers

Issue 4 • April 1981

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  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1981, Page(s): c1
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  • IEEE Computer Society

    Publication Year: 1981, Page(s): c2
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  • Interconnection Networks for Parallel and Distributed Processing: An Overview

    Publication Year: 1981, Page(s):245 - 246
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1617 KB)

    CURRENT integrated circuit technology is making feasible computer systems consisting of hundreds or thousands of processors. One of the most difficult problems in the design of large-scale parallel and distributed computer systems is the choice of a communications network. An efficient method is needed for linking the system's processors, memories, and other devices to each other. As can be observ... View full abstract»

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  • The Binary Tree as an Interconnection Network: Applications to Multiprocessor Systems and VLSI

    Publication Year: 1981, Page(s):247 - 253
    Cited by:  Papers (100)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2428 KB)

    The binary tree is a natural way to organize complex computations by a computer. For problems that can be naturally divided into a tree structure, a great deal of parallelism may be employed. In this paper we examine several aspects of the binary tree structure as it relates to both multiprocessor systems and to VISI circuit design. First, we present an algorithm for mapping an arbitrary binary tr... View full abstract»

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  • A Cluster Structure as an Interconnection Network for Large Multimicrocomputer Systems

    Publication Year: 1981, Page(s):254 - 264
    Cited by:  Papers (41)  |  Patents (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3259 KB)

    This paper presents a cluster structure, characterized by a set of structure parameters and a set of interconnection functions, as a conceptual interconnection scheme for large multimicrocomputer systems. It is shown that three popular interconnection structures (hypercube, hierarchy, and tree structures) are examples of the cluster structure. Two communication problems (traffic congestion and mes... View full abstract»

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  • Communication Structures for Large Networks of Microcomputers

    Publication Year: 1981, Page(s):264 - 273
    Cited by:  Papers (193)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4427 KB)

    This paper compares nine network interconnection schemes and introduces "dual-bus hypercubes," a cost-effective method of connecting thousands of dual-port single-chip microcomputers into a room-sized information processing system, a "network computer." Each network node is a chip containing memory and a pair of processors for tasks and input/output. Nodes are linked by shared communication buses,... View full abstract»

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  • Analysis and Simulation of Buffered Delta Networks

    Publication Year: 1981, Page(s):273 - 282
    Cited by:  Papers (199)  |  Patents (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3814 KB)

    Delta networks are a class of multistage interconnection networks with gate complexity less than crossbar switches that are easy to control, and which include several networks that have been proposed in the literature as special cases. Buffered delta networks have queues of packets between the stages of the network. This paper presents analytic and simulation results for the performance of delta n... View full abstract»

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  • VLSI Performance Comparison of Banyan and Crossbar Communications Networks

    Publication Year: 1981, Page(s):283 - 291
    Cited by:  Papers (46)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2993 KB)

    The performance characteristics of banyan and crossbar communications networks are compared in a VLSI environment, where it is assumed that the entire network resides on a single VLSI chip and operates in a circuit switched mode. A high-level model of the space (area) and time (delay) requirements for these networks is developed and relative performance comparisons are made based on a space-time p... View full abstract»

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  • Analysis of Chordal Ring Network

    Publication Year: 1981, Page(s):291 - 295
    Cited by:  Papers (167)  |  Patents (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2210 KB)

    A family of regular graphs of degree 3, called Chordal Rings, is presented as a possible candidate for the implementation of a local network of message-connected (micro) computers. For a properly constructed graph in this family having n nodes the diameter, or maximum length message path, is shown to be of 0(n 1/2). The symmetry of the graphs makes it possible to determine message routing by using... View full abstract»

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  • An Easily Controlled Network for Frequently Used Permutations

    Publication Year: 1981, Page(s):296 - 298
    Cited by:  Papers (20)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (649 KB)

    A π network, which is a concatenation of 2 Ω networks [2], along with a simple control algorithm is proposed. This network is capable of performing all Ω network realizable permutations and the bit-permute-complement (BPC) class of permutations[5] in 0(log N) time. The control algorithm is actually a multiple-pass control algorithm on the Ω network, which is more general than P... View full abstract»

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  • CONET: A Connection Network Model

    Publication Year: 1981, Page(s):298 - 301
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (828 KB)

    A programmed connection network model and its variants are briefly explained. The results of a parameter study are exposed showing the inherent differences in the structural variations. Some preliminary conclusions concerning effectiveness are drawn. View full abstract»

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  • Call for Papers Special Issue on Supersystems

    Publication Year: 1981, Page(s): 301
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  • Call for Papers

    Publication Year: 1981, Page(s): 301
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  • Computer Software Professional...

    Publication Year: 1981, Page(s): 301-c
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  • IEEE Computer Society Publications

    Publication Year: 1981, Page(s): 301
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  • Call for Papers

    Publication Year: 1981, Page(s): 301
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org