IEEE Transactions on Computers

Issue 3 • March 1981

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Displaying Results 1 - 19 of 19
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1981, Page(s): c1
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  • IEEE Computer Society

    Publication Year: 1981, Page(s): c2
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  • Editor's Notice

    Publication Year: 1981, Page(s):169 - 171
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  • Formal Models of Capability-Based Protection Systems

    Publication Year: 1981, Page(s):172 - 181
    Cited by:  Papers (51)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3024 KB)

    The role of formal modeling in the study of capability- based protection systems is explained. Historical background is presented and a model of a computer science department's computer system is presented. A survey of several important capability-based models is given including the Harrison, Ruzzo, Ullman model, the Take-Grant model, and grammatical models. These models are presented in a unified... View full abstract»

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  • On Minimal Test Sets for Locating Single Link Failures in Networks

    Publication Year: 1981, Page(s):182 - 190
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3955 KB)

    Consider a network which can be represented by an acyclic directed graph such that the links represented by the edges are subject to failure. Under the assumption that at most one link can fail at any time, we want to locate a failed link, if any, by means of certain tests. A test is performed by injecting a signal at a vertex and monitoring it at another vertex and can reveal if there is a failed... View full abstract»

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  • An Algorithm for Solving Linear Recurrence Systems on Parallel and Pipelined Machines

    Publication Year: 1981, Page(s):190 - 206
    Cited by:  Papers (35)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5056 KB)

    A new algorithm for the solution of linear recurrence systems on parallel or pipelined computers is described. Time bounds, speed-up and efficiency for SIMD and MIMD computers with fixed number of arithmetic elements (AE's), as well as for pipelined computers with fixed number of stages per operation, are obtained. The model of each computer is discussed in detail to explain better performance of ... View full abstract»

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  • On the Mapping Problem

    Publication Year: 1981, Page(s):207 - 214
    Cited by:  Papers (326)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2094 KB)

    In array processors it is important to map problem modules onto processors such that modules that communicate with each other lie, as far as possible, on adjacent processors. This mapping problem is formulated in graph theoretic terms and shown to be equivalent, in its most general form, to the graph isomorphism problem. The problem is also very similar to the bandwidth reduction problem for spars... View full abstract»

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  • An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits

    Publication Year: 1981, Page(s):215 - 222
    Cited by:  Papers (707)  |  Patents (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2198 KB)

    The D-algorithm (DALG) is shown to be ineffective for the class of combinational logic circuits that is used to implement error correction and translation (ECAT) functions. PODEM (path-oriented decision making) is a new test generation algorithm for combinational logic circuits. PODEM uses an implicit enumeration approach analogous to that used for solving 0-1 integer programming problems. It is s... View full abstract»

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  • Planar Crossovers

    Publication Year: 1981, Page(s):223 - 225
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (422 KB)

    Those bases which permit the realization of a planar crossover are characterized. View full abstract»

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  • Synthesis of Finite State Algorithms in a Galois Field GF[pn]

    Publication Year: 1981, Page(s):225 - 229
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (755 KB)

    This correspondence describes a method for achieving synthesis of finite state algorithms by the use of a set of logic elements that execute field operations from the Galois field GF[pn]. The method begins with a definition of the algorithm to be synthesized in a completely specified finite state flow table form. A polynomial expansion of this flow table function is derived. A canonical sequential... View full abstract»

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  • Rewritable Programmable Logic Array of Current Mode Logic

    Publication Year: 1981, Page(s):229 - 234
    Cited by:  Papers (3)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1090 KB)

    This paper describes new ways to construct a rewritable programmable logic array (R-PLA) of current mode logic (CML) and to control READ/WRITE operations of the R-PLA. The R-PLA is constructed by splitting a conventional Random Access Memory (RAM) of CML into two parts. Therefore, each cell structure of the new R-PLA is identified with that of the conventional RAM, differing from a complicated cel... View full abstract»

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  • Existence Algorithms for Synchronizing/Distinguishing Sequences

    Publication Year: 1981, Page(s):234 - 237
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (889 KB)

    This correspondence describes two efficient algorithms for determining whether or not a given finite-state machine has a synchronizing sequence and a distinguishing sequence, respectively, and compares them with the well-known tree method. Compared with the tree method, these new algorithms are easier to implement and require less memory size. Since they do not require keeping and searching a look... View full abstract»

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  • Realization of Fault-Tolerant Machines—Linear Code Application

    Publication Year: 1981, Page(s):237 - 240
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (840 KB)

    This correspondence deals with the fault-tolerant realization of a sequential machine using error-correcting (n,k) linear codes. Earlier works in the same area confine their attention to modified Reed-Muller Code and perfect Hamming Code and achieve the realization using a number of majority logic gates, which makes the entire realization quite complex. The realization discussed in this paper need... View full abstract»

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  • Comments on "Autocorrelation Function of Sequential M-Bit Words Taken from an N-Bit Shift Register (PN) Sequence"

    Publication Year: 1981, Page(s): 241
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (107 KB)

    This note suggests that the result by D. R. Morgan1is already covered by a more general solution obtained in [1] by A. R. Pratt. There the general problem of computing the autocovariance function of linearly weighted words from maximum length pseudorandom sequences is solved. View full abstract»

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  • Advance Announcement... Tutorial Week East 81

    Publication Year: 1981, Page(s): 241
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  • Call for Papers

    Publication Year: 1981, Page(s): 241
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  • Computer Software Professional...

    Publication Year: 1981, Page(s): 241-c
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  • IEEE Computer Society Publications

    Publication Year: 1981, Page(s): 241
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  • Call for Papers

    Publication Year: 1981, Page(s): 241
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org