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IEEE Transactions on Computers

Issue 3 • March 1975

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  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1975, Page(s): c1
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  • IEEE Computer Society

    Publication Year: 1975, Page(s): c2
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  • Editor's Notice

    Publication Year: 1975, Page(s): 225
    Cited by:  Papers (1)
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  • Error-Correcting Codes for Byte-Organized Arithmetic Processors

    Publication Year: 1975, Page(s):226 - 232
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2704 KB)

    This paper considers codes with radix r > 2 which are capable of correcting arbitrary arithmetic errors in any radix r digit. If each radix r digit represents a byte of b binary digits (e.g., r = 2b), these codes correct any combination of errors occurring in the b binary digits of any single byte. A theoretical basis for these codes is presented, along with practical considerations ... View full abstract»

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  • Multiple Fault Detection for Combinational Logic Circuits

    Publication Year: 1975, Page(s):233 - 242
    Cited by:  Papers (14)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4640 KB)

    An algorithm for generating test sets to detect all the multiple stuck-at-faults in combinational logic circuits is presented. This algorithm generates a test set using a set of functions, called representative functions, which consists of much fewer functions than all possible multiple stuck-at fault functions, but is sufficient for test generation. Two different methods of finding such a set of ... View full abstract»

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  • Polynomially Complete Fault Detection Problems

    Publication Year: 1975, Page(s):242 - 249
    Cited by:  Papers (148)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3584 KB)

    We look at several variations of the single fault detection problem for combinational logic circuits and show that deciding whether single faults are detectable by input-output (I/O) experiments is polynomially complete, i.e., there is a polynomial time algorithm to decide if these single faults are detectable if and only if there is a polynomial time algorithm for problems such as the traveling s... View full abstract»

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  • Two-Level Emitter-Function Logic Structures for Logic-in-Memory Computers

    Publication Year: 1975, Page(s):250 - 258
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3568 KB)

    Logic-in-memory (LIM) organization allows central processor functions of computing systems to be combined with memory in regular arrays. The cells of these arrays can themselves be constructed regularly and economically using similar two-level emitter-function logic (EFL) structures. The structure is a development of current-mode logic and it permits the large-scale integration (LSI) realization o... View full abstract»

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  • Arithmetic Networks and Their Minimization Using a New Line of Elementary Units

    Publication Year: 1975, Page(s):258 - 280
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5864 KB)

    A family of switching networks, called "arithmetic networks," is investigated. The elementary units of these networks are generalizations of full adders that can process input signals of different weights. View full abstract»

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  • An Optimal Set of Discriminant Vectors

    Publication Year: 1975, Page(s):281 - 289
    Cited by:  Papers (250)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2296 KB)

    A new method for the extraction of features in a two-class pattern recognition problem is derived. The main advantage is that the method for selecting features is based entirely upon discrimination or separability as opposed to the more common approach of fitting. The classical example of fitting is the use of the eigenvectors of the lumped covariance matrix corresponding to the largest eigenvalue... View full abstract»

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  • Some Properties of Threshold Logic Unit Pattern Recognition Networks

    Publication Year: 1975, Page(s):290 - 298
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2456 KB)

    A condition for separation of two categories by a pattern-recognition network formed by an array of threshold logic units (TLU) and an additional decision element is discussed. The array implements a set of hyperplanes that partition the sample space, and the array outputs and the sample vector elements form the input to the decision element. It is shown that this input is separable by a convex su... View full abstract»

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  • Generating and Counting the Double Adjacencies in a Pure Circulating Shift Register

    Publication Year: 1975, Page(s):299 - 304
    Cited by:  Papers (10)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1848 KB)

    Magleby [6] proved that there can exist at most two adjacencies between a pair of cycles of a pure circulating register. We give a theorem (Theorem 1) for construction of all such pairs of cycles, and our theorem enables us to count them. View full abstract»

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  • Hazard Correction in Synchronous Sequential Circuits

    Publication Year: 1975, Page(s):305 - 310
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (848 KB)

    Limitations which are placed on input and clock signals of single and double-rank synchronous sequential circuits with memory composed of level-triggered flip-flops are presented and compared with the results of Unger [1] and Curtis [2]. View full abstract»

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  • The Discrete Equation of the Straight Line

    Publication Year: 1975, Page(s):310 - 313
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (768 KB)

    A new method of description of a straight line defined on a square grid is presented. The discrete equation of the straight line (desl) is introduced as an extension of the classical Cartesian equation, and applies to straight lines quantized on a grid by the grid intersect method. The desl includes a set of intercepts which can be scanned in proper order to generate the chain for the given straig... View full abstract»

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  • Computing Robust Walsh-Fourier Transform by Error Product Minimization

    Publication Year: 1975, Page(s):313 - 317
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (960 KB)

    A scheme for computing the Walsh-Fourier transform of noisy data is presented. The results are insensitive to isolated noise points, even when their magnitudes are large. View full abstract»

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  • Pipeline Iterative Arithmetic Arrays

    Publication Year: 1975, Page(s):317 - 322
    Cited by:  Papers (11)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (976 KB)

    Observations are made on the effect of pipelining iterative arrays for multiplication. It is suggested that the best type of latched array for multiplication is the save-carry iterative array. The effect of pipelining on other iterative arrays, including the general multiply/divide array is discussed. View full abstract»

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  • Parallel Multiplicative Algorithms for Some Elementary Functions

    Publication Year: 1975, Page(s):322 - 325
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (760 KB)

    This correspondence presents generalized higher radix algorithms for some elementary functions which use fast parallel m-bit multipliers where radix = 2m. These algorithms are extensions of those iterative schemes which are based on multiplications by (1 + 2-i) and the use of prestored values of ln (1 + 2-i) and tan-1(2-i). The particular functions under... View full abstract»

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  • A Note on Base –2 Arithmetic Logic

    Publication Year: 1975, Page(s):325 - 329
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1064 KB)

    Circuits for performing arithmetic operations using base –2 representations are considered. Study of the counting process leads to a negative binary up-down counter and new simple methods for positive-negative base conversions. The advantage of employing carry-borrow rather than carry-only during additions is pointed out. Certain special features of negation, arithmetic shift, multiplication... View full abstract»

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  • A Computer Interface for Efficient Zero-Crossing Interval Measurement

    Publication Year: 1975, Page(s):329 - 331
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (776 KB)

    A technique is described which makes use of a hardware computer interface to efficiently extract zero-crossing interval information from continuous time signals. Each zero-crossing of the input waveform causes the contents of a clock register to be transferred into a clock buffer register simultaneously with the generation of a computer interrupt. Following this, the clock register is restarted an... View full abstract»

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  • Easily Tested Three-Level Gate Networks for T or More of N Symmetric Functions

    Publication Year: 1975, Page(s):331 - 335
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (752 KB)

    This correspondence considers three-level AND/OR gate realizations for T or more of N symmetric functions and gives a design procedure. The procedure can be used to design relatively large networks. The three-level realizations require substantially fewer test patterns for fault detection, gates, and gate inputs than the minimum two-level network. For example, the minimum two-level network for the... View full abstract»

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  • Comments on the Review of "Principles of Interactive Computer Graphics"

    Publication Year: 1975, Page(s): 336
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    I was amazed to see in the February 1974 issue of the TRANSACTIONS ON COMPUTERS such an inept review of Principles of Interactive Computer Graphics, by Robert Sproull and myself. There must be serious faults in your procedures both for choosing reviewers and for monitoring their efforts, if reviews as worthless as Dr. Biberman's are allowed to reach the printed page. View full abstract»

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  • Reviewer's Reply

    Publication Year: 1975, Page(s): 336
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    I am indeed sorry the authors are upset about my review of their book, Principles of Interactive Computer Graphics. My review should not have surprised you or the authors since I sent advance copies via the publisher to each of them. I was not happy to write the review and twice, as you recall, I attempted to withdraw. View full abstract»

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  • Book Reviews Editor's Comments

    Publication Year: 1975, Page(s): 336
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    Reviews are solicited from professionals whose field of interest includes the subject matter of the book. View full abstract»

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  • IEEE Computer Society Publications

    Publication Year: 1975, Page(s): 336-a
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  • IEEE Computer Society Membership & Publications

    Publication Year: 1975, Page(s): 336
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    Freely Available from IEEE

Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org