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IEEE Transactions on Computers

Issue 3 • Date March 1974

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Displaying Results 1 - 25 of 30
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1974, Page(s): c1
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    Freely Available from IEEE
  • IEEE Computer Society

    Publication Year: 1974, Page(s): c2
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  • The Use of Walsh Functions in the Wiener Analysis of Nonlinear Systems

    Publication Year: 1974, Page(s):225 - 232
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2184 KB)

    A powerful means of analyzing nonlinear systems is provided by the Wiener functional expansion. However, this technique has not been implemented widely in experimental situations because of the difficulties associated with measuring the kernels of the system, which constitutes the analysis problem. A new method of measuring the kernels is described here in which the Walsh functions are used as the... View full abstract»

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  • Design of Weighted Counters with Rational Scale Using Continued Fraction Expansion

    Publication Year: 1974, Page(s):232 - 238
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3264 KB)

    Modulo qiscalers or counters are one-input Moore machines whose state set contains a unique subset (called cycle) of states which occur in cyclic succession. View full abstract»

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  • Asynchronous Sequential Machines Designed for Fault Detection

    Publication Year: 1974, Page(s):239 - 249
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3080 KB)

    A design procedure is presented which allows for detection of faults in asynchronous sequential machines in a real time environment. Faults affecting both the output states and the internal operation of the machine are detected. The class of faults initially considered are single stuck-at-1 and stuck-at-0 faults. However, since the detection system presented is static and continuous, the class of ... View full abstract»

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  • Linear Automata Approximation Problem

    Publication Year: 1974, Page(s):249 - 255
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3272 KB)

    The problem of approximating a linear automaton (LA) over the field of real numbers by an automaton over the field of rationals is considered. "Strong" and "weak" types of approximation are defined and investigated. Necessary and sufficient conditions for an automaton to be approximable are given. The strong approximation method enables rational computation in irrational linear systems which is su... View full abstract»

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  • A Unified Theory of the Algebraic Topological Methods for the Synthesis of Switching Systems

    Publication Year: 1974, Page(s):255 - 267
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4224 KB)

    A set of logic operators, first proposed by Roth [3], based on an algebraic topological interpretation of a function table, have provided the basis for the subsequent development of algorithms for the computer aided synthesis of combinatorial networks. View full abstract»

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  • Parallel Generation of Binary Search Trees

    Publication Year: 1974, Page(s):268 - 271
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1808 KB)

    A method of constructing binary search trees in a multiprocessor computer system is proposed. Asymptotically, this method achieves the maximum possible increase in speed as compared with a single processor computer system. To make better use of this method, a parametrized restructuring of binary search trees is also discussed. View full abstract»

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  • Dynamic Memories with Rapid Random and Sequential Access

    Publication Year: 1974, Page(s):272 - 276
    Cited by:  Papers (8)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1872 KB)

    We propose a new architecture for dynamic memories in which the contents of any cell in memory can be accessed by applying a sequence of two primitive memory operations. The advantage of our memory over previous designs is its fast sequential access. Any word in an n cell memory can be accessed in 0(log n) steps. However, once two consecutive words have been accessed, following words can be access... View full abstract»

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  • A Multiple-Stream Registerless Shared-Resource Processor

    Publication Year: 1974, Page(s):277 - 285
    Cited by:  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2840 KB)

    A novel high-performance processor architecture for processing a large number of independent instruction streams is proposed and its operating behavior studied. The proposed processor operates on instruction words in a two-address format (thereby eliminating the "operating registers"), and is organized in a fashion which permits as high degree of internal buffering and pipelining. The processor ha... View full abstract»

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  • On the Memory Conflict Problem in Multiprocessor Systems

    Publication Year: 1974, Page(s):286 - 293
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2312 KB)

    This paper presents quadratic programming models of memory conflict in multiprocessor systems where main memory consists of a set of memory modules common to all processors. Two jobs (programs) are said to be in conflict, or subject to memory conflict, whenever at a given time portions of them must be executed in the same memory module by different processors. We are interested in minimizing the t... View full abstract»

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  • Equivalence and Transformations for Post Multivalued Algebras

    Publication Year: 1974, Page(s):294 - 300
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2088 KB)

    Four commonly used multivalued algebras, the disjoint system of Post algebra developed by Epstein, the monotonic system of algebra called Muehldorf by some authors, the free system of algebra introduced by Braddock and Epstein, and the Herrmann system of algebra generalized here from its original three element algebra, are shown to be isomorphic. Transformations are then developed for transforming... View full abstract»

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  • Application of Continued Fractions for Fast Evaluation of Certain Functions on a Digital Computer

    Publication Year: 1974, Page(s):301 - 309
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2456 KB)

    The purpose of this paper is to develop a method for evaluation of certain elementary functions on a digital computer by the use of continued fractions. The time required for this evaluation is drastically reduced by using "short" operations like shift and add, instead of multiplications. Functional consistency is the most important factor that aliows the expansion of a function into a continued f... View full abstract»

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  • Data Manipulating Functions in Parallel Processors and Their Implementations

    Publication Year: 1974, Page(s):309 - 318
    Cited by:  Papers (74)  |  Patents (29)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3744 KB)

    This paper shows that there exists a class of functions called data manipulating functions (DMF's), in sequential as well as paralel processors. The circuits used to achieve these functions can be considered to form an independent functional block, called a data manipulator. A basic organization applicable to both sequential and parallel processors is then suggested. The main deviation of a parall... View full abstract»

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  • A Note on Q-Universal Logic Modules

    Publication Year: 1974, Page(s):319 - 320
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (288 KB)

    Some comments are offered on the number of I/O terminals p of the Q-universal logic modules (ULM) [2]. An equation is given in this note which will determine minimum number of I/O terminals for all n. View full abstract»

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  • An Iterative-Improvement Approach to the Numerical Solution of Vector Toeplitz Systems

    Publication Year: 1974, Page(s):320 - 325
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (880 KB)

    This paper describes an algorithm for the approximate solution of vector Toeplitz systems via an iterative-improvement method. The algorithm exploits the special structure of Toeplitz matrices, namely, their similarity to vector circulants, and is particularly well suited for solving large systems. Sufficient convergence conditions and concrete error bounds for the iteration are presented along wi... View full abstract»

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  • A New Representation of Sequential Machines for Determining All Incompatible Pairs

    Publication Year: 1974, Page(s):325 - 326
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (344 KB)

    In this correspondence a new representation of a sequential machine (without output) is given which enables the determination of all incompatible pairs without any intermediate step(s). The method is programmable, is much faster, and requires less memory than existing methods. View full abstract»

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  • Comments on "An Augmented Iterative Array for High Speed Division"

    Publication Year: 1974, Page(s):326 - 327
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (416 KB)

    Division is a serial operation and it is argued that parallel division arrays are unnecessary since serial circulating dividers can be designed which are almost as fast, when using the same technology, but are a fraction of the cost. View full abstract»

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  • Authors' Reply2

    Publication Year: 1974, Page(s): 327
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (248 KB)

    The main point made in the above comment, namely, that in our division array [1] only one row of the array is actively performing processing at any one time, is well taken. This leads to the reasonable conclusion that serially reusing a single row of logic, enabled by temporary storage of the partial remainder, leads to only a small (about 25 percent) speed degradation accompanied by substantial c... View full abstract»

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  • A Modification to the SHR-Optimal State Assignment Procedure

    Publication Year: 1974, Page(s):327 - 329
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (632 KB)

    In a recently published article, Story et al. detailed an organized search process leading to the optimum state assignment for a synchronous sequential machine. Their procedure begins with the calculation of a set of lower bounds (minimum numbers) on the costs of the excitation logic required for each possible distinct partial state assignment. View full abstract»

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  • A Formula for Ternary Network Cost

    Publication Year: 1974, Page(s):329 - 332
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (528 KB)

    By means of Monte Carlo method, an average cost function of ternary two variable switching function is obtained. View full abstract»

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  • A Note on Easily Testable Realizations for Logic Functions

    Publication Year: 1974, Page(s):332 - 333
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (408 KB)

    It is shown that at most, n + 3 tests are required to detect any single stuck-at fault in an AND gate or a single faulty EXCLUSIVE OR (EOR) gate in a Reed-Muller canonical form realization of a switching function. View full abstract»

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  • Comment on "Some New Results on Average Worst Case Carry"

    Publication Year: 1974, Page(s): 333
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    When reading the above paper1, the unwary person might easily come to the conclusion that "most carries are short." Actually, such a statement needs to be qualified. In fact, if a computer engineer designs an adder on this basis, he would probably find that the average add time is not as short as the theoretical analysis would lead him to expect. This is because Briley's analysis, and t... View full abstract»

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  • Comments on "Multiple Fault Detection in Combinational Networks"

    Publication Year: 1974, Page(s):333 - 334
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB)

    Some comments on a recent contribution on multiple fault detection using test sets for single fault detection are presented. A counter example that shows some defects in generalizing from a tree to an arbitrary network are also included. View full abstract»

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  • Authors' reply2

    Publication Year: 1974, Page(s): 334
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org