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IEEE Transactions on Computers

Issue 12 • Date Dec. 1972

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Displaying Results 1 - 25 of 41
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1972, Page(s):c1 - 1475
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    Freely Available from IEEE
  • IEEE Computer Society

    Publication Year: 1972, Page(s): c2
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    Freely Available from IEEE
  • Discrete Convolutions via Mersenne Transrorms

    Publication Year: 1972, Page(s):1269 - 1273
    Cited by:  Papers (98)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1120 KB)

    A transform analogous to the discrete Fourier transform is defined in the ring of integers with a multiplication and addition modulo a Mersenne number. The arithmetic necessary to perform the transform requires only additions and circular shifts of the bits in a word. The inverse transform is similar. It is shown that the product of the transforms of two sequences is congruent to the transform of ... View full abstract»

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  • Upper Bounds on Walsh Transforms

    Publication Year: 1972, Page(s):1273 - 1280
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1880 KB)

    Many applications of Walsh functions employ Walsh series expansions. To obtain the advantage of data compression many of the Walsh coefficients must be negligible. It is thus desirable to have a scheme by which their magnitudes can be estimated with little computation. We found that the Walsh transform Fi of a function that can be differentiated by an arbitrary number of times is expressible as a ... View full abstract»

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  • On Translation Algorithms in Residue Number Systems

    Publication Year: 1972, Page(s):1281 - 1285
    Cited by:  Papers (8)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1016 KB)

    This paper considers translation problems in residue number systems. The conversion from a fixed-base representation to a residue representation can be done using residue adders only; we show that relatively simple combinational logic can be used to replace one level of residue addition. In the reverse translation problem, we examine the conditions under which base extension can be used to compute... View full abstract»

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  • A Synthesis Method for Cutpoint Cellular Arrays

    Publication Year: 1972, Page(s):1286 - 1292
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1520 KB)

    In the present paper three theorems are developed to merge two columns in a cutpoint cellular array into one, depending on the sequence of cutpoint indices in each of the columns. An algorithm is then proposed for realizing arbitrary switching functions with a cutpoint cellular array, based on a set of rules derived from the above theorems. The algorithm is tested with numerous examples. View full abstract»

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  • On the Number of Operations Simultaneously Executable in Fortran-Like Programs and Their Resulting Speedup

    Publication Year: 1972, Page(s):1293 - 1310
    Cited by:  Papers (60)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4560 KB)

    This paper is concerned with the problem of analyzing ordinary Fortran-like programs to determine how many of their operations could be performed simultaneously. Algorithms are presented for handling arithmetic assignment statements, DO loops and IF statement trees. The height of the parse trees of arithmetic expressions is reduced by distribution of multiplication over addition as well as the use... View full abstract»

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  • Parallel Task Execution in a Decentralized System

    Publication Year: 1972, Page(s):1310 - 1322
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3712 KB)

    The overhead involved in the real-time multiprocessor execution of parallel-processable segments of a sequential program is investigated. The execution follows a preprocessing phase in which the source program is analyzed and the parallel-processable segments are recognized. A number of representations of a parallel-processable program are possible. A table representation is used, and a technique ... View full abstract»

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  • A General Class of Maximal Codes ror Computer Applications

    Publication Year: 1972, Page(s):1322 - 1331
    Cited by:  Papers (34)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2320 KB)

    The error-correcting codes for symbols from GF (2b) are often used for correction of byte-errors in binary data. In these byte-error-correcting codes each check symbol in GF (2b) is expressed as b binary check digits and each information symbol in GF (2b), likewise, is expressed by b binary information digits. A new class of codes for single-byte-error correction is presented. The code is general ... View full abstract»

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  • Error-Control Techniques for Logic Processors

    Publication Year: 1972, Page(s):1331 - 1336
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1496 KB)

    A new error-control technique for logic processors is given. The proposed technique uses Reed-Muller codes (RMC's). The design scheme given has better efficiency than the schemes proposed earlier. The improved efficiency is obtained by relaxing a basic assumption originally made by Elias. Furthermore, it is shown that the efficiency of the proposed scheme asymptotically approaches the maximum effi... View full abstract»

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  • Distribution-Free Pattern Verification Using Statistically Equivalent Blocks

    Publication Year: 1972, Page(s):1337 - 1347
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2840 KB)

    A nonparametric classification procedure based on distribution-free tolerance regions is presented. Without knlowledge of the class probability distributions, the procedure gives information about the expected performance of the classifier through use of only one sample of statistically independent observations from each class. With this procedure, a two-class discriminant can be designed for a gi... View full abstract»

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  • Design of a Random-Pulse Computer for Classifying Binary Patterns

    Publication Year: 1972, Page(s):1347 - 1354
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1848 KB)

    This paper proposes a novel design for a parallel nonadaptive binary pattern classifier. The structure employs random-pulse (stochastic) computing elements to economically realize multimodal nonlinear discriminant functions similar in form to those used in potential function classifiers. The technique achieves efficient hardware utilization by employing a READ-ONLY memory (ROM) without addressing ... View full abstract»

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  • Measuring Concavity on a Rectangular Mosaic

    Publication Year: 1972, Page(s):1355 - 1364
    Cited by:  Papers (30)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2352 KB)

    A theory for describing and measuring the concavities of cellular complexes (digitized silhouettes) is developed. This theory involves the use of the minimum-perimeter polygon and its convex hull. View full abstract»

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  • Optimum State Assignment for Synchronous Sequential Circuits

    Publication Year: 1972, Page(s):1365 - 1373
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1888 KB)

    The problem of encoding the internal states of synchronous sequential switching circuits so as to minimize the combinational network cost is treated. Cost is defined as the number of AND-OR inputs required in the two-level implementation of each memory element input equation separately ( i.e., the cost is not reduced initially by the existence of common terms between equations). An algorithm has b... View full abstract»

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  • Generation of Representative Functions of the NPN Equivalence Classes of Unate Boolean Functions

    Publication Year: 1972, Page(s):1373 - 1379
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1576 KB)

    An algorithm is described which generates the set of representative functions of the negation and/or permutation of variables and negation of the function (NPN) equivalence classes of unate Boolean functions. The algorithm is based upon integer programming techniques. The set of representative functions for the NPN equivalence classes of unate functions of six or fewer variables was obtained using... View full abstract»

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  • A Signal-Dependent Error Arising in Digitally Processed Images Due to Quantization

    Publication Year: 1972, Page(s):1380 - 1385
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2184 KB)

    A troublesome error has been found in digital data which represents an image renormalized by a computer. The error, which takes the form of anomalous patterns in the switching sequence of certain bits, contributes unnecessary, signal-dependent noise to the-data. Experimental results illustrating this phenomenon are shown and a theoretical model is derived. The model shows that the phenomenon resul... View full abstract»

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  • Some Comments on Postcorrections for Nonrestoring Division

    Publication Year: 1972, Page(s):1385 - 1394
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1608 KB)

    Assumptions for the problem of postcorrection in nonrestoring division, as treated in a previous note by Rhyne, are reviewed. A specific type of quotient and remainder with the so-called concatenation property is then defined for. signed operands. A criterion is also given, extending the one given by Rhyne, to determine postcorrections applicable to quotient and remainder resulting from nonrestori... View full abstract»

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  • Analysis of the Terminal Behavior of Some Classes of Iterative Arrays of Linear Machines

    Publication Year: 1972, Page(s):1394 - 1399
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1200 KB)

    General methods are presented for analyzing the terminal behavior of the classes of one-dimensional unidirectional iterative systems with arbitrary many intercell leads and two-dimensional iterative systems with unidirectional signal flow and one intercell lead on each axis, where the cell structure is either an arbitrary linear switching circuit (combinational) or an arbitrary linear sequential m... View full abstract»

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  • Cellular Synthesis of Synchronous Sequential Machines

    Publication Year: 1972, Page(s):1399 - 1405
    Cited by:  Papers (2)  |  Patents (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1032 KB)

    A method of synthesizing sequential machines using identical cells arranged in arrays is described. The array is connected in a regular pattern and can be designed to include features such as redundancy and programmability. Minimal synthesis is also discussed. View full abstract»

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  • The Inhibition of Potential Parallelism by Conditional Jumps

    Publication Year: 1972, Page(s):1405 - 1411
    Cited by:  Papers (57)  |  Patents (32)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1808 KB)

    This note reports the results of an examination of seven programs originally written for execution on a conventional computer (CDC-3600). We postulate an infinite machine, one with an infinite memory and instruction stack, infinite registers and memory, and an infinite number of functional units. This machine wiU exectite a program in parallel at maximum speed by executing each instruction at the ... View full abstract»

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  • Percolation of Code to Enhance Parallel Dispatching and Execution

    Publication Year: 1972, Page(s):1411 - 1415
    Cited by:  Papers (13)  |  Patents (73)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1408 KB)

    This note investigates the increase in parallel execution rate as a function of the size of an instruction dispatch stack with lookahead hardware. Under the constraint that instructions are not dispatched until all preceding conditional branches are resolved, stack sizes as small as 2 or 4 achieve most of the parallelism that a hypothetically infinite stack would. View full abstract»

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  • New Algorithms for the Approximate Evaluation in Hardware of Binary Logarithms and Elementary Functions

    Publication Year: 1972, Page(s):1416 - 1421
    Cited by:  Papers (18)  |  Patents (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (816 KB)

    After an analysis of the errors introduced in the approximate computation of the x2function (O ≤ x ≤ 1) and its distributions, we find that a parabolic rather than linear fit to log2 (1 + x), (O ≤ x ≤ 1) can be performed in hardware without increasing the number of necessary sums. An improvement, by a factor of about 2.5, in the absolute maximum error can be expe... View full abstract»

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  • A Design Procedure for Fault-Locatable Switching Circuits

    Publication Year: 1972, Page(s):1421 - 1426
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1176 KB)

    A technique to design fault-locatable combinational switching circuits is given. The networks resulting from the application of the proposed technique have at most three levels of gates. View full abstract»

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  • Self-Checking Combinational Logic Binary Counters

    Publication Year: 1972, Page(s):1426 - 1430
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (848 KB)

    A high-speed, self-checking count circuit realization is attainable by using combinational logic and parity prediction. The utilization of combinational logic as opposed to sequential logic design generally minimizes the amount of software necessary for routine and diagnostic testing. Count circuits with parity prediction find application in stand-alone, self-checking processors. View full abstract»

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  • On Determining Optimum Simple Golay Marking Transformations for Binary Image Processing

    Publication Year: 1972, Page(s):1430 - 1433
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1784 KB)

    A computer program has been written which is capable of evaluating all possible Golay marking transformations related to a particular pattern recognition task using an exhaustive search technique. Such evaluations are reported for separating two image data sets: one taken from biomedical microscopy; the other, aerial reconnaissance. View full abstract»

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The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org