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IEEE Transactions on Computers

Issue 6 • June 1971

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Displaying Results 1 - 25 of 29
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1971, Page(s):c1 - 726
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    Freely Available from IEEE
  • IEEE Computer Society

    Publication Year: 1971, Page(s): c2
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  • The Design of a Class of Fast Fourier Transform Computers

    Publication Year: 1971, Page(s):617 - 623
    Cited by:  Papers (26)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1400 KB)

    The design of a class of special-purpose computers for time-series analysis by Fourier transformation is described. The computers are sequential machines which implement machine-oriented fast Fourier transform algorithms obtained by factoring the discrete Fourier transform to an arbitrary radix. View full abstract»

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  • Continuous Shading of Curved Surfaces

    Publication Year: 1971, Page(s):623 - 629
    Cited by:  Papers (244)  |  Patents (56)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5224 KB)

    A procedure for computing shaded pictures of curved surfaces is presented. The surface is approximated by small polygons in order to solve easily the hidden-parts problem, but the shading of each polygon is computed so that discontinuities of shade are eliminated across the surface and a smooth appearance is obtained. In order to achieve speed efficiency, the technique developed by Watkins is used... View full abstract»

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  • A Theory of Asynchronous Control Networks

    Publication Year: 1971, Page(s):629 - 638
    Cited by:  Papers (17)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2176 KB)

    A digital system can be viewed as an interaction of two structures, a data flow structure and a control structure. In this paper we adopt this point of view and concentrate on defining a structure theory for asynchronous control networks, which is formed by interconnecting certain basic control modules. Each control module performs a single primitive control function. View full abstract»

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  • A Heuristic Algorithm for the Testing of Asynchronous Circuits

    Publication Year: 1971, Page(s):639 - 647
    Cited by:  Papers (64)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2094 KB)

    This paper describes an algorithm for the computation of tests to detect failures in asynchronous sequential logic circuits. It is based upon an extension of the D-algorithm [1]. Discussion of experience with a program of the procedure is given. View full abstract»

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  • Program Suitability for Parallel Processing

    Publication Year: 1971, Page(s):647 - 654
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2038 KB)

    This paper describes the Fortran parallel task recognizer and the directed graph model upon which it is based. The recognizer is itself a Fortran program. As input the recognizer accepts source programs written in Fortran; as output the recognizer generates a set of tables which communicate to the operating system information regarding the parallel processability of source program tasks. The recog... View full abstract»

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  • Cascaded Multithreshold Networks

    Publication Year: 1971, Page(s):655 - 662
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1472 KB)

    Any switching function can always be realized by a single multithreshold threshold element possessing a suitable number of thresholds. However, the practical realization of such elements often presents serious difficulties; as such it becomes more convenient to realize the given function in the form of a network of multi-threshold threshold elements, each possessing fewer thresholds. In this paper... View full abstract»

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  • Generation of Halftones by Computer-Controlled Microfilm Recorder

    Publication Year: 1971, Page(s):662 - 664
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3231 KB)

    Computers, in conjunction with microfilm recording equipment, are capable of generating pictures with a reasonable number of gray levels and good resolution. A method is described for producing pictures by means of halftone dot patterns using such equipment. The method is relatively insensitive to variations in hardware performance and adjustments. View full abstract»

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  • A Note on Fast Cyclic Convolution

    Publication Year: 1971, Page(s):665 - 666
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB)

    This note presents a new algorithm for computing the cyclic convolution of two vectors over a commutative ring. The algorithm requires n(n1+1)...(nk+1)/2kmultiplications for the convolution of two n-vectors, where n=n1...nkis a factorization of n into factors which are pairwise relatively prime. View full abstract»

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  • A State Assignment Procedure for Asynchronous Sequential Circuits

    Publication Year: 1971, Page(s):666 - 668
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (818 KB)

    This paper presents a new procedure for constructing nonuniversal shared-row internal state assignments for asynchronous sequential circuits. The method consists basically of establishing an initial code with the minimum number of variables required to distinguish the states. satisfactory assignment is obtained. State variables added in the expansion of an assignment are merely the EXCLUSIVE OR of... View full abstract»

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  • Serial Adders with Overflow Correction

    Publication Year: 1971, Page(s):668 - 671
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (914 KB)

    A method of implementing two single-bit adders is discussed. These adders can be used individually to realize the conventional functions of serial addition and serial multiplication on a pair of operands, or they can be cascaded to allow the serial addition of three operands for forming the product of complex numbers. In either case, the circuits will detect the occurrence of an overflow or the ge... View full abstract»

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  • Design of an Associative Memory

    Publication Year: 1971, Page(s):671 - 674
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB)

    An associative memory system using push-down or first-in first-out (FIFO) lists as its basic building elements is described. With the development of large-scale integration technology (LSI), it is expected that devices with regular repetitive structure and high gate/interconnection ratio can be manufactured at extremely low cost. Push-down and FIFO evidently belong to that category. The logic desi... View full abstract»

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  • Slave Memories and Segmentation

    Publication Year: 1971, Page(s):674 - 675
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (440 KB)

    It is pointed out that in a computer provided with multiple base-limit registers a slave or buffer memory may be used to reduce time spent in address validation and relocation, as well as for its normal purpose of reducing memory access time. View full abstract»

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  • Scaling Machine Arithmetic

    Publication Year: 1971, Page(s):675 - 678
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (976 KB)

    A general approach to the problem of scaling machine arithmetic is developed. This leads to the determination of inequalities that can serve as a basis for the derivation of systematic scaling techniques. The inequalities and techniques are shown to apply to complement arithmetic with either integral or fractional machine operations and to absolute value and sign arithmetic for both types of opera... View full abstract»

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  • A Binary Multiplication Scheme Based on Squaring

    Publication Year: 1971, Page(s):678 - 680
    Cited by:  Papers (23)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (560 KB)

    Using the formula A · B=[(A+ B)/2]2-[(A-B)/2]2, the binary multiplication problem is reducible to that of decomposing the square of P 0 · P1P2... Pkinto a sum of two or three quantities. For the eight-bit case, a study of the multiplication parallelogram suggests p2= R+ S+ T, where Pl and p8 appear only in R, and P2, P7 ap... View full abstract»

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  • A Distance Criterion for Figural Pattern Recognition

    Publication Year: 1971, Page(s):680 - 685
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (976 KB)

    The set of transformations which preserve the equivalence classes of figural patterns is considered. The simple figure and its abstract description in a metric space are defined. An appropriate distance is proposed to be applied to pattern recognition. View full abstract»

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  • Feedback in Homomorphic Realizations

    Publication Year: 1971, Page(s):685 - 688
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (832 KB)

    It is known that for every integer d there are transition functions not isomorphically realizable by any net having feedback indegree (the largest number of wires that any delay receives from other delays in its feedback loop) less than d. Here we show that, in contrast to the isomorphic case, every transition function can be homomorphically realized by nets of feedback indegree not exceeding 2. T... View full abstract»

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  • Inessential Errors in Sequential Machines

    Publication Year: 1971, Page(s):688 - 690
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (736 KB)

    Hartmanis and Stearns defined the concept of an inessential error in their study of errors in sequential machines and represented such errors by means of an error partition Π E. Although they showed that ΠE could not be determined using only the usual partition pair algebras, they did not provide a means by which it could be determined. The purpose of this note is to develop an algorithm... View full abstract»

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  • PCN Equivalence Class Invariants and Information Quantities

    Publication Year: 1971, Page(s):691 - 694
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (696 KB)

    The switching variables in a switching circuit are considered as binary random variables. The input signals are given joint probabilities, from which the output signals' probabilities are known. The joint entropy, or average information content, of subsets of variables is defined, and a proof is given that a set of these entropies are characteristic invariants of the PCN equivalence classes. View full abstract»

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  • Realization of Nonlinearly Separable Switching Functions

    Publication Year: 1971, Page(s):695 - 698
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (880 KB)

    In this paper CEP functions are applied to realize nonlinearly separable switching functions. It is proved that the introduction of these functions may realize all the 22nswitching functions of n binary variables. A model of a nonlinear threshold component is proposed to realize the switching functions. View full abstract»

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  • Gate-Interconnection Minimization of Switching Networks Using Negative Gates

    Publication Year: 1971, Page(s):698 - 706
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1724 KB)

    In this note, we develop an algorithm to design a two-level switching network composed of negative gates with no fan-in restriction imposed on them. The resulting network is such that it minimizes the cost function h(G, 1), a monotone nondecreasing function of G and I, where G is the total number of gates and I is the total number of interconnections in the network. In other words, the earlier wor... View full abstract»

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  • An Implementation Technique for Walsh Functions

    Publication Year: 1971, Page(s):706 - 707
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (336 KB)

    A technique is presented for the generation of any finite set of Walsh functions in both serial and parallel form. It uses a straightforward constructive definition of these functions. In order to simultaneously generate the first 2nfunctions, [(22n-1)/3] storage devices and (2n+2-5) logic gates are required. View full abstract»

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  • Fast Complex BIFORE Transform by Matrix Partitioning

    Publication Year: 1971, Page(s):707 - 710
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (376 KB)

    Using elementary matrix partitioning techniques, a fast algorithm for computing the complex BIFORE transform is developed. View full abstract»

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  • Contributors

    Publication Year: 1971, Page(s):711 - 712
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    Freely Available from IEEE

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The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org