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IEEE Transactions on Computers

Issue 2 • Feb. 1971

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Displaying Results 1 - 25 of 28
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1971, Page(s):c1 - 260
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    Freely Available from IEEE
  • IEEE Computer Society

    Publication Year: 1971, Page(s): c2
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    Freely Available from IEEE
  • Degrees of Freedom and Modular Structure in Matrix Multiplication

    Publication Year: 1971, Page(s):133 - 141
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1542 KB)

    An algorithm is presented which enables certain matrix multiplications in a digital computer to be implemented with a considerable savings in storage and computational operations. For NxN matrix vector multiplication (that is a multiplication of a matrix by a vector) a maximum of N Σn-1 r=0 pr, storage words are necessary compared to normal full matrix storage requirements of N View full abstract»

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  • Algebraic Fault Analysis for Constrained Combinational Networks

    Publication Year: 1971, Page(s):141 - 148
    Cited by:  Papers (3)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1488 KB)

    A sequential machine that processes its inputs without changing state can be represented as a constrained combinational network. A system of Boolean equations that represent such a network must include assertions that formalize the required constraints. These constraints can be expressed as assertions about certain gate inputs and certain gate outputs within the network. In such networks, redundan... View full abstract»

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  • Ambiguity in Graphs and Expressions

    Publication Year: 1971, Page(s):149 - 153
    Cited by:  Papers (27)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (937 KB)

    A regular expression is called unambiguous if every tape in the event can be generated from the expression in one way only. The flow-graph technique for constructing an expression is shown to preserve ambiguities of the graph, and thus, if the graph is that of a deterministic automaton, the expression is unambiguous. A procedure for generating a nondeterministic automaton which preserves the ambig... View full abstract»

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  • Parallel Processing with the Perfect Shuffle

    Publication Year: 1971, Page(s):153 - 161
    Cited by:  Papers (767)  |  Patents (24)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1797 KB)

    Given a vector of N elements, the perfect shuffle of this vector is a permutation of the elements that are identical to a perfect shuffle of a deck of cards. Elements of the first half of the vector are interlaced with elements of the second half in the perfect shuffle of the vector. View full abstract»

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  • Modular LSI Control Logic Design with Error Detection

    Publication Year: 1971, Page(s):161 - 166
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1168 KB)

    This paper describes a modular approach of implementing the control circuitry. It is achieved by the use of multifunctional binary decoder circuits in conjunction with a transistor array high-speed READ-ONLY memory. View full abstract»

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  • Two Approaches for Increasing Storage Density in Modern Digital Computing Systems

    Publication Year: 1971, Page(s):167 - 175
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1135 KB)

    Modern digital computing systems are primarily limited in how densely information may be recorded on the magnetic storage elements by the manner in which the information is retrieved (detected) from these storage facilities. Current systems store information at a density around 1000 bits per inch (bit/in); system elements, other than the detection process, could easily handle densities in excess o... View full abstract»

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  • An Algorithm for Finding Intrinsic Dimensionality of Data

    Publication Year: 1971, Page(s):176 - 183
    Cited by:  Papers (126)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1246 KB)

    An algorithm for the analysis of multivariant data is presented along with some experimental results. The basic idea of the method is to examine the data in many small subregions, and from this determine the number of governing parameters, or intrinsic dimensionality. This intrinsic dimensionality is usually much lower than the dimensionality that is given by the standard Karhunen-Loève techn... View full abstract»

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  • The Avoidance and Elimination of Function Hazards in Asynchronous Sequential Circuits

    Publication Year: 1971, Page(s):184 - 189
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1232 KB)

    Armstrong et al.[1] have shown how critical races and function hazards can be suppressed in asynchronous sequential circuits by using gate delays to advantage rather than introducing explicit delay elements, if certain delay assumptions are satisfied. This paper shows that the same techniques may be used to design circuits which will respond reliably to simultaneous changes of several input variab... View full abstract»

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  • Periodic Representations and T-Partitionable Equivalents of Sequential Machines

    Publication Year: 1971, Page(s):190 - 198
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1664 KB)

    This paper deals with the problem of finding nontrivial periodic representations, with not necessarily null transient duration, of deterministic sequential machines. The well-known results in this area, based on means of d-equivalence partitions or regular d-partitions on the set of internal states of a sequential machine A, are generalized. Apart from this, the problem of finding nontrivial perio... View full abstract»

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  • A Realizable Model for Stochastic Sequential Machines

    Publication Year: 1971, Page(s):199 - 204
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1000 KB)

    A new model for stochastic sequential machines is introduced. This model consists of a deterministic Mealy-type synchronous sequential machine some of whose inputs are random number generators while the outputs of another set of random number generators are used to perturb the output function of the deterministic Mealy machine. Thus this model is physically realizable in terms of random number gen... View full abstract»

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  • Complexity of Partially Defined Combinational Switching Functions

    Publication Year: 1971, Page(s):204 - 208
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (796 KB)

    The complexity of the switching networks necessary to realize arbitrary combinational functions is studied. Asymptotic upper and lower bounds for fully defined functions are well known, while lower bounds also exist for partially defined combinational functions. The present paper supplements these results with the upper bounds for the partially defined functions. The results have possible relevanc... View full abstract»

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  • Hybrid Computer Solution of Optimal Control Problems

    Publication Year: 1971, Page(s):209 - 211
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (621 KB)

    This paper discusses limitations which arise when a method proposed by Miura et al. [1] is used for solving certain two-point boundary value problems on the hybrid computer. It is shown that the method proposed in [1] will not work in all cases. An example where the method fails is given. However, to emphasize the basic elegance and usefulness of this method, an extension to cover a more general t... View full abstract»

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  • A Simplified Definition of Walsh Functions

    Publication Year: 1971, Page(s):211 - 213
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (567 KB)

    A simple method is presented which defines Walsh functions in terms of products of Rademacher functions, but which preserves the ordering of the Walsh functions necessary to retain the notion of increasing number of zero crossings, or sequency. View full abstract»

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  • A Simple Postcorrection for Nonrestoring Division

    Publication Year: 1971, Page(s):213 - 214
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (346 KB)

    The nonrestoring division algorithm offers the advantages of speed and logical simplicity when working with signed, two's-complement binary numbers. The algorithm does not assure sign agreement between the calculated quotient and remainder, however, which is a disadvantage in some applications. This paper describes a postcorrection that will force sign agreement between quotient and remainder. The... View full abstract»

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  • An Iterative Array for Multiplication of Signed Binary Numbers

    Publication Year: 1971, Page(s):214 - 216
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (485 KB)

    An iterative array for multiplication of signed binary numbers is described. It uses controlled adder-subtractor cells. The negative numbers are in two's complement form and the product, if negative, is also available in this form without requiring any additional operations. View full abstract»

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  • Interactive Use of Problem Knowledge for Clustering and Decision Making

    Publication Year: 1971, Page(s):216 - 222
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1286 KB)

    An approach to clustering and decision making is presented where a prior problem knowledge is inserted interactively. The problem knowledge inserted is in the form of subcategory mean vectors and covariance matrices and in the expert's confidence that these means and covariances accurately characterize the category. Then observations of patterns from the category are used to update these a priori ... View full abstract»

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  • The Accelerated Relaxation Method for Linear Inequalities

    Publication Year: 1971, Page(s):222 - 225
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (812 KB)

    An algorithm called the accelerated relaxation method for finding a solution of a set of inequalities is given. Experimental results show that the accelerated relaxation method is far more efficient than the relaxation method, the fixed increment method, and the generalized-inverse Ho-Kashyap algorithm. View full abstract»

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  • Generation of a Clock Pulse for Asynchronous Sequential Machines to Eliminate Critical Races

    Publication Year: 1971, Page(s):225 - 226
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (384 KB)

    A circuit for generating a clock pulse for asynchronous circuits is given, and when used with transition sensitive flip-flops eliminates critical races for an arbitrary state assignment. Thus the minimum number of internal variables may be used. Furthermore, logic and sequential hazards will not affect the circuit performance. View full abstract»

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  • High Speed Generation of Maximal Length Sequences

    Publication Year: 1971, Page(s):227 - 229
    Cited by:  Papers (29)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (584 KB)

    The construction described in this note makes possible the generation of any given linear shift register sequence of maximal period p= 2n-1, at a rate k times faster than the shift pulse rate. The construction is valid for any positive integer k which is not a multiple of p and it employs at most k linear shift registers of degree n or less. View full abstract»

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  • An Improved Method of Prime C-Class Derivation in the State Reduction of Sequential Networks

    Publication Year: 1971, Page(s):229 - 231
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (618 KB)

    The state reduction of sequential networks is achieved by selecting a minimal set of prime C-classes satisfying the cover and closure requirements. The derivation of all the C-classes and subsequent prime C-classes has been illustrated by Grasselli and Luccio [1] and relies on maximal C-class decomposition. In this note, an alternative method for deriving the prime C-classes is described. The meth... View full abstract»

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  • A Note on the Solution of Sequential Boolean Equations

    Publication Year: 1971, Page(s):231 - 234
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (768 KB)

    The problem of solving sequential Boolean equations is examined in terms of nondeterministic finite transducers. An upper bound for the delay is established and a method for obtaining a deterministic equivalent is described. View full abstract»

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  • Topological Solution of Bilateral Switching Networks

    Publication Year: 1971, Page(s):234 - 238
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (864 KB)

    A method is described for synthesizing bilateral switching networks using a topological solution that does not employ algebraic or linear graph techniques. Using the eye as a pattern detector, one may trace an optimum path directly on the truth table from the input to the one or more desired outputs. This method overcomes many of the difficulties that have been encountered with relay contact logic... View full abstract»

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  • A Remark on the Concepts of Input-Memory and Output-Memory of Sequential Machines

    Publication Year: 1971, Page(s): 239
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (192 KB)

    The definitions of input-memory and output-memory of a sequential machine are examined and an attempt is made to clarify some, confusion in the literature regarding the concepts of input-memort and output-memory. View full abstract»

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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org