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IEEE Transactions on Computers

Issue 10 • Oct. 1971

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Displaying Results 1 - 25 of 25
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1971, Page(s):c1 - 1239
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  • IEEE Computer Society

    Publication Year: 1971, Page(s): c2
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  • Editor's Notice

    Publication Year: 1971, Page(s): 1139
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  • Patch: Analog Computer Patching from a Digital Simulation Language

    Publication Year: 1971, Page(s):1140 - 1146
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1265 KB)

    An analog computer patching program has been written as an extension to S/360 CSMP. This approach to patching programs has the advantage of providing patching information directly from a simulation run without appreciable extra effort on the part of the user. View full abstract»

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  • An Algorithm for the Machine Computation of Partial-Fractions Expansion of Functions Having Multiple Poles

    Publication Year: 1971, Page(s):1147 - 1152
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (800 KB)

    The partial-fractions expansion of a function F(s)/(s-a)m, m > 1, involves the computation of m coefficients, namely (1 /i!)(diF(a)/dsi), 0 ≤ i ≤ m-1. Wehrhahn [1] and Karni [3] have provided a method for computing these coefficients algebraically. A new approach is taken here which involves approximating a multiple pole by neighboring simple poles. ... View full abstract»

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  • Checking Experiments ror Sequential Machines

    Publication Year: 1971, Page(s):1152 - 1166
    Cited by:  Papers (29)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3786 KB)

    Some new procedures for designing efficient checking experiments for sequential machines are described. These procedures are based on the use of four types of sequences introduced, namely, the compound DS, the resolving sequence (RS), the compound. RS, and the simple I/O sequence. Significant reduction in the bound on the length of checking experiments is achieved. Along a parallel line of develop... View full abstract»

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  • Fault Tolerant Sequential Machines

    Publication Year: 1971, Page(s):1167 - 1177
    Cited by:  Papers (19)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2597 KB)

    A machine representation of permanent memory faults is introduced where, if M is a sequential machine representing some fault free system, a memory fault is represented by a function μ on the states of M, and the result of the fault by an appropriately determined machine Mμ. Given this representation, the investigation is primarily concerned with faults that are tolerated (mas... View full abstract»

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  • An Efficient Organization or Large Frequency-Dependent Files for Binary Searcking

    Publication Year: 1971, Page(s):1178 - 1187
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1575 KB)

    The efficient organization of a very large file to facilitate search and retrieval operations is an important but very complex problem. In this paper we consider the case of a large file in which the frequency of use of its component subfiles are known. We develop the organization of the file so that the average number of entries to locate individual items in it by means of binary search is minimi... View full abstract»

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  • An Iterative Analog Computer Using Pulse-Ratio Modulation

    Publication Year: 1971, Page(s):1188 - 1192
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (808 KB)

    The design and the performance of a fast iterative analog computer that is based on the use of pulse-ratio modulation representation is presented. The basic element employed in the design of the computing units of the computer is a pulse-ratio modulator. The solution of an eigenvalue problem by the computer is presented as an example of its applications. The results obtained agree well with analyt... View full abstract»

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  • The H Diagram: A Graphical Approach to Logic Design

    Publication Year: 1971, Page(s):1192 - 1196
    Cited by:  Papers (3)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1264 KB)

    A geometric model, termed an H diagram, is an effective visual aid in the synthesis of combinational logic circuits. The model is derived by means of coordinate transformations of a hypercube, resulting in a simple two-dimensional framework for mapping a binary function. The H diagram can be expanded to accommodate an arbitrary number of variables, while maintaining a mathematically consistent pat... View full abstract»

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  • On the Cost of Base N Adders

    Publication Year: 1971, Page(s):1196 - 1203
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1721 KB)

    The use of N-valued logics in the design of base N adder circuits is considered. Two types of N-valued logics are examined, Post N-valued logics and binary-coded N-valued logics. Specific implementations of these nonbinary logics are discussed. General formulas for the sum and carry functions of an adder are established in order to calculate the cost of base N adder stages using the Post logics. R... View full abstract»

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  • Error Bounds for a Contextual Recognition Procedure

    Publication Year: 1971, Page(s):1203 - 1207
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (952 KB)

    The general problem of the use of context in computer character recognition is briefly reviewed. For the special case where the context is generated by a two-state stationary Markov chain, upper bounds are obtained for the average error probability of an optimal recognition procedure, based on compound decision functions. These bounds are nonparametric and simple functions of the "differences" bet... View full abstract»

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  • Whirl Decomposition of Stochastic Systems

    Publication Year: 1971, Page(s):1208 - 1211
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    Using a technique based on "state splitting" it is shown that every n-state Markov system is decomposable into a whirl interconnection of n−1 two-state Markov systems. View full abstract»

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  • On the Bounds for State-Set Size in the Proofs of Equivalence Between Deterministic, Nondeterministic, and Two-Way Finite Automata

    Publication Year: 1971, Page(s):1211 - 1214
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (948 KB)

    The bounds on state-set size in the proofs of the equivalence between nondeterministic and deterministic finite automata and between two-way and one-way deterministic finite automata are considered. It is shown that the number of states in the subset machine in the first construction cannot be reduced for certain cases. It is also shown that the number of states in the one-way automation construct... View full abstract»

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  • Recognition of Monotonic and Unate Cascade Realizable Functions Using an Informational Model of Switching Circuits

    Publication Year: 1971, Page(s):1214 - 1219
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1236 KB)

    A model of combinational switching circuits used as information processors is described. A set of entropies (in the information theory sense) can be associated with each completely specified function, and can be easily computed from the truth table representation for the function. It is shown that simple arithmetic relations between the magnitudes of these entropies are sufficient to identify mono... View full abstract»

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  • Contributors

    Publication Year: 1971, Page(s): 1220
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  • B71-2 Introduction to Computer Organization

    Publication Year: 1971, Page(s): 1221
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  • B71-3 Microprogramming: Principles and Practices

    Publication Year: 1971, Page(s):1221 - 1222
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  • B71-4 Mathematical Programming in Practice

    Publication Year: 1971, Page(s): 1222
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  • B715 APL Users' Glide

    Publication Year: 1971, Page(s):1222 - 1223
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  • Abstracts of Current Computer Literature

    Publication Year: 1971, Page(s):1224 - 1239
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  • Blank Page

    Publication Year: 1971, Page(s): 1239
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  • Blank Page

    Publication Year: 1971, Page(s): 1239
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  • Blank Page

    Publication Year: 1971, Page(s): 1239
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  • Information for authors

    Publication Year: 1971, Page(s): 1239
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org