IEEE Transactions on Computers

Issue 8 • Aug. 1969

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  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1969, Page(s):c1 - 783
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  • IEEE Computer Group

    Publication Year: 1969, Page(s): c2
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  • Foreword

    Publication Year: 1969, Page(s): 689
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  • The Questions of Systems Implementation with Large-Scale Integration

    Publication Year: 1969, Page(s):690 - 694
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1959 KB)

    Large-scale integration (LSI) is four to five years old for many of us, yet we must continue to ask some very fundamental questions. Can we reach the substantial hardware cost reductions projected? How much will this impact system cost? Where is the market and how will it evolve? Will implementation problems force radical system designs? Does the key rest with automation, e.g., with simulation and... View full abstract»

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  • Arithmetic Unit of a Computing Element in a Global, Highly Parallel Computer

    Publication Year: 1969, Page(s):695 - 698
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1737 KB)

    The arithmetic unit of a digital computing element for a proposed globally controlled, highly parallel computer having up to thousands of such computing elements is described. Because operand words are regarded as circular, and any digit position may be designated as most significant during an operation, the atom of the computing element is the digit position logic, i.e., the computing elements ar... View full abstract»

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  • Digital Adaptive-Element Building Blocks for MOS Large-Scale Integration

    Publication Year: 1969, Page(s):699 - 706
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1244 KB)

    Large-scale integration of adaptive-element building blocks, in a small number of monolithic silicon structures, leads to a degree of freedom and versatility in organizing computing structures that has never before existed. The definition of the function of an adaptive-separation computer is examined, block diagrammed, and repetitive computations are defined. These are then partitioned to define b... View full abstract»

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  • The Block-Oriented Computer

    Publication Year: 1969, Page(s):706 - 718
    Cited by:  Papers (5)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (2857 KB)

    LSI will have a profound effect on the design of computer systems ranging from evolutionary changes in implementation to revolutionary changes in basic architecture. This paper discusses a computer composed of an array of processors. Entire wafers are used, rather than wafers diced into chips. The computer utilizes software to substitute process elements for the purpose of compensating for imperfe... View full abstract»

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  • Cellular Logic-in-Memory Arrays

    Publication Year: 1969, Page(s):719 - 727
    Cited by:  Papers (60)  |  Patents (63)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1907 KB)

    As a direct consequence of large-scale integration, many advantages in the design, fabrication, testing, and use of digital circuitry can be achieved if the circuits can be arranged in a two-dimensional iterative, or cellular, array of identical elementary networks, or cells. When a small amount of storage is included in each cell, the same array may be regarded either as a logically enhanced memo... View full abstract»

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  • A High-Speed Carry Circuit for Binary Adders

    Publication Year: 1969, Page(s):728 - 732
    Cited by:  Papers (2)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (2776 KB)

    A high-speed carry circuit for binary parallel adders is described. The circuit consists of emitter followers connected in series to form a transmission path for carry signals obtained from the individual bits of the adder. View full abstract»

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  • Hexagonal Parallel Pattern Transformations

    Publication Year: 1969, Page(s):733 - 740
    Cited by:  Papers (154)  |  Patents (14)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1434 KB)

    The concept of the two-dimensional (2-D) parallel computer with square module arrays was first introduced by Unger. It is the purpose of this paper to discuss the relative merits of square and hexagonal module arrays, to propose an operational symbolism for the various basic hexagonal modular transformations which may be performed by these comupters, to illustrate some logical circuit implementati... View full abstract»

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  • The Error Characteristics of the Binary Rate Multiplier

    Publication Year: 1969, Page(s):741 - 745
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (712 KB)

    The binary rate multiplier is a device which has been used for many years in hybrid computing (operational digital techniques) and control systems as a means for generating a pulse train of average frequency proportional to the value of a binary number stored in a register. In general, the pulse spacing is irregular and the number of pulses generated in a given time fluctuates above and below the ... View full abstract»

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  • Table-Lookup/Interpolation Function Generation for Fixed-Point Digital Computations

    Publication Year: 1969, Page(s):745 - 749
    Cited by:  Papers (15)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (800 KB)

    For very fast function generation with small fixed-point digital computers, the n-bit argument word x is split into an N-bit word representing the breakpoint abscissa Xi for table-lookup by indirect addressing, and an n-N bit word representing the interpolation difference X-Xi. The complete procedure takes only about 50 machine cycles (50 μs) for equal breakpoint intervals, and about 70 machi... View full abstract»

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  • Evaluation of the Amplitude Distribution of Quasi-Gaussian Signals Obtained From Pseudorandom Noise

    Publication Year: 1969, Page(s):749 - 752
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (661 KB)

    A method is presented for finding the amplitude distribution of the sum of the contents of more than n stages of a feedback shift register connected with feedback over n stages. The analysis illustrates the causes of the skew distributions observed in practice. Some theoretical results are presented. View full abstract»

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  • Hazards in Asynchronous Sequential Circuits

    Publication Year: 1969, Page(s):752 - 759
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1162 KB)

    This paper discusses some aspects of hazards in asynchronous sequential circuits. In particular, methods of hazard detection and correction are given for the analysis of circuits 1) designed by criteria other than hazard prevention, and/or 2) in which upper and lower bounds may be placed on delays. A natural ordering for sequential hazards is introduced as a basis for the procedures. View full abstract»

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  • Comments on "Fault Testing and Diagnosis in Combinational Digital Circuits"

    Publication Year: 1969, Page(s): 760
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (168 KB)

    To be of general value, a digital fault diagnosis method must be able to handle intermittent and multiple faults. View full abstract»

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  • Author's Reply2

    Publication Year: 1969, Page(s): 760
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (168 KB)

    Dr. Dwyer's first three comments appear to be correct observations on the general subject of testing and diagnosis, although the initial statement in his second comment is incorrect (see [1], first paragraph of Section II-A, page 353). View full abstract»

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  • T. F. Dwyer3(415) 760

    Publication Year: 1969, Page(s):(210) T. F. Dwyer<sup>3</sup> 760 - 760
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (168 KB)

    Dr. Kautz references his statement that multiple faults can in principle be handled by his method, a point that is beyond dispute. View full abstract»

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  • Correction to "Subtraction by Minuend Complementation"l

    Publication Year: 1969, Page(s): 760
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  • Contributors

    Publication Year: 1969, Page(s):761 - 762
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  • R69-22 Computation over Galois Fields Using Shiftregisters

    Publication Year: 1969, Page(s): 763
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  • R69-23 The Reduction of Tape Reversals for Off-Line One-Tape Turing Machines

    Publication Year: 1969, Page(s): 763
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  • R69-24 Universal Logic Circuits and Their Modular Realizations

    Publication Year: 1969, Page(s):763 - 764
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  • R69-25 A System Organization for Resource Allocation

    Publication Year: 1969, Page(s): 764
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  • Abstracts of Current Computer Literature

    Publication Year: 1969, Page(s):765 - 783
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  • Blank Page

    Publication Year: 1969, Page(s): 783
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org