IEEE Transactions on Computers

Issue 5 • May 1969

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  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1969, Page(s):c1 - 498
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  • IEEE Computer Group

    Publication Year: 1969, Page(s): c2
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  • A Nonlinear Mapping for Data Structure Analysis

    Publication Year: 1969, Page(s):401 - 409
    Cited by:  Papers (1393)  |  Patents (32)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2664 KB)

    An algorithm for the analysis of multivariate data is presented along with some experimental results. The algorithm is based upon a point mapping of N L-dimensional vectors from the L-space to a lower-dimensional space such that the inherent data "structure" is approximately preserved. View full abstract»

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  • Mathematical Analysis of Ferrite Core Memory Arrays

    Publication Year: 1969, Page(s):409 - 416
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1376 KB)

    A mathematical model for simulating pulse propagation in ferrite core memory arrays is described. Although specifically developed to analyze 3-dimensional arrays, the model is sufficiently general to give a satisfactory analysis of pulse propagation, waveform deterioration, and noise generation in a wide variety of memory configurations. The model treats the memory as a generalized, mutually coupl... View full abstract»

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  • Automated Scaling for Hybrid Computers

    Publication Year: 1969, Page(s):416 - 423
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2715 KB)

    In this paper a scheme is proposed for automating the scaling process for analog computers in hybrid (analog-digital) systems. The analog computer's magnitude and frequency constraints are imposed by a set of equations defining amplifier input factors. The digital computer is used not only to compute and implement these inputs but also to monitor analog amplifier outputs so that present scale fact... View full abstract»

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  • A Multiaccess Associative Memory

    Publication Year: 1969, Page(s):424 - 428
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1262 KB)

    Accessing of more than one word truly simultaneously in time from the same memory module is termed multiaccess. An associative memory with such a capability can be made from reset-set flip-flops. There are practical limitations to the number of words that can be simultaneously accessed. Some hardware and software implications of multiaccessibility are discussed. View full abstract»

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  • Realization of Sequential Machines with Threshold Elements

    Publication Year: 1969, Page(s):428 - 439
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2521 KB)

    The state assignment problem for finite-state sequential machines is examined in the context of threshold logic. An algorithm is developed for assigning binary codes to the states, inputs, and outputs so that the state variable and output variable functions satisfy the necessary condition of 2-assumability that they be linearly separable. The algorithm deals with 2-block partitions by which the as... View full abstract»

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  • Asynchronous Sequential Circuits with Feedback

    Publication Year: 1969, Page(s):440 - 450
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2199 KB)

    An "asynchronous unit delay" is an n-input n-output asynchronous sequential circuit in which the present value of the output n-tuple is equal to the value of input n-tuple prior to the last input change. In this paper it is shown that such a circuit can be used as a basic building block in the design of any asynchronous circuit. It is shown that any fundamental mode flow table is realizable by a c... View full abstract»

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  • Multigate Synthesis of General Boolean Functions by Threshold Logic Elements

    Publication Year: 1969, Page(s):451 - 456
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (976 KB)

    A decomposition and reconstruction approach for synthesizing an arbitrary Boolean function with a minimum number of threshold logic elements connected by feedforward paths only is presented. Attention is mainly focused on cascade-type realizations. The approach has the advantage that near-minimal solutions are readily derived. An estimate of how closely the minimality has been approached is obtain... View full abstract»

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  • Computation of the Fast Walsh-Fourier Transform

    Publication Year: 1969, Page(s):457 - 459
    Cited by:  Papers (90)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (457 KB)

    The discrete, orthogonal Walsh functions can be generated by a multiplicative iteration equation. Using this iteration equation, an efficient Walsh transform computation algorithm is derived which is analogous to the Cooley-Tukey algorithm for the complex-exponential Fourier transform. View full abstract»

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  • Threshold Logic Design of Pulse-Type Sequential Networks

    Publication Year: 1969, Page(s):459 - 465
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1235 KB)

    A modification of the conventional design method for pulse-type sequential logic is developed in which threshold gates are used in all of the combinational portions of the circuit. The canonical configuration, memory element employed, tabular design aids, etc., found in the conventional method were changed as necessary in order to use more effectively the unique properties possessed by threshold e... View full abstract»

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  • A Method for Finding Feedback Partitions for Sequential Machines

    Publication Year: 1969, Page(s):465 - 467
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (785 KB)

    An explicit method is given for determining feedback partitions (defined by Hartnanis and Stearns) from a study of state tables. This method is based on their theorem for testing whether a given partition is a feedback partition. View full abstract»

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  • Generation of Design Equations in Asynchronous Sequential Circuits

    Publication Year: 1969, Page(s):467 - 472
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1333 KB)

    One step in the synthesis procedure for realizing an asynchronous sequential switching circuit is the generation of next-state and output state equations from a simplified and coded flow table description of the circuit. The usual approach for determining these equations is to first construct a state table from the coded flow table, and then construct transition and output tables. For large flow t... View full abstract»

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  • On Asynchronous Machines with Flip-Flops

    Publication Year: 1969, Page(s): 473
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  • A Theorem on the State Reduction of Synthesized Stochastic Machines

    Publication Year: 1969, Page(s):473 - 474
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (472 KB)

    Stochastic sequential machines produced by the insertion of noise in a deterministic machine are considered; the question of the relationship between the state reduction of the machine so formed and that of the underlying deterministic machine is raised. The theorem states that, for the case of observational noise only, if the stochastic machine has stochastically distinguishable outputs, then it ... View full abstract»

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  • Contributors

    Publication Year: 1969, Page(s):475 - 476
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  • R69-9 Deterministic Stack Automata and the Quotient Operator

    Publication Year: 1969, Page(s): 477
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  • R69-10 Bounded Action Machines: Toward an Abstract Theory of Computer Structure

    Publication Year: 1969, Page(s): 477
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  • R69-11 A New High Performance Computer d-c Amplifier

    Publication Year: 1969, Page(s): 477
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  • R69-12 Design Method for Digital Dead Beat Controller

    Publication Year: 1969, Page(s): 478
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  • Abstracts of Current Computer Literature

    Publication Year: 1969, Page(s):479 - 498
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  • Blank Page

    Publication Year: 1969, Page(s): 498
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  • Blank Page

    Publication Year: 1969, Page(s): 498
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  • Information for authors

    Publication Year: 1969, Page(s): 498
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org