IEEE Transactions on Computers

Issue 2 • Feb. 1969

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Displaying Results 1 - 19 of 19
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1969, Page(s): c1
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  • IEEE Computer Group

    Publication Year: 1969, Page(s): c2
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  • An Accumulator Chip

    Publication Year: 1969, Page(s):105 - 114
    Cited by:  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1872 KB)

    A large-scale integrated-circuit chip has been designed under the sponsorship of the Air Force Avionics Laboratory. The chip was developed as part of a logic synthesizer effort of the Design Automation group at Litton Systems, Inc., Guidance and Control Systems Division. It was designed as a type or category to be multiply used with one other gating type chip whose format is prescribed by the logi... View full abstract»

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  • Unate Cellular Logic

    Publication Year: 1969, Page(s):114 - 121
    Cited by:  Papers (26)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1682 KB)

    A fundamental problem in "cellular logic" is to be able to "synthesize" "cellular arrays" for arbitrary switching functions that minimize a set of design parameters like size of the arrays and complexity of the individual cells and of the interconnection pattern on the cells. This paper is an attempt to develop "minimization algorithms for cellular arrays." View full abstract»

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  • Unateness Test of a Boolean Function and Two General Synthesis Methods Using Threshold Logic Elements

    Publication Year: 1969, Page(s):122 - 131
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1720 KB)

    This paper presents an elaboration of the unateness test of a Boolean function based on the definition of the so-called simple zero or unit transition of arguments of the given Boolean function. It is proved that the unateness of the given Boolean function is subject to the necessary and sufficient condition that there must be no occurrence of both simple unit transition and zero transition at the... View full abstract»

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  • Sequential Machines with Less Delay Elements than Feedback Paths

    Publication Year: 1969, Page(s):132 - 144
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2798 KB)

    In this paper the possibility of removing in synchronous sequential machines some of the delay elements which store the internal state is discussed. Theorems and methods are given for eliminating all removable delay elements from a given realization of a synchronous machine and for selecting the assignments leading to a realization which requires the least number of delay elements. It is shown how... View full abstract»

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  • Synthesis of Linear Sequential Machines with Unspecifed Outputs

    Publication Year: 1969, Page(s):145 - 153
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2296 KB)

    This paper presents a unified approach to the synthesis of linear sequential machines with unspecified outputs. The basic tools employed here are the transition graphs and the coset partitions of linear machines. Coset partitions are studied in detail and used to clarify the various synthesis methods using partitions. They are then combined with the transition graphs to form a set of unified synth... View full abstract»

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  • Transition Logic Circuits and a Synthesis Method

    Publication Year: 1969, Page(s):154 - 168
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3056 KB)

    A transition signal is a change of binary level, either from 0 to 1 or from 1 to 0, regardless of the direction. It is often more convenient to describe a switching circuit in terms of level transitions, and a circuit with at least one input variable represented as a transition signal is called a transition logic circuit. Transition logic circuits are essentially level sequential circuits and, as ... View full abstract»

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  • A Procedure for Selecting Diagnostic Tests

    Publication Year: 1969, Page(s):168 - 175
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1748 KB)

    The problem considered is the selection of a subset of diagnostic test inputs for combinational circuits. The selected subset of tests will diagnose a single fault to the package level, i.e., until the package which contains the fault is determined. The procedure in obtaining this subset makes use of information provided by multiple outputs, and through a local optimization technique provides a ne... View full abstract»

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  • Delay-Free Asynchronous Circuits with Constrained Line Delays

    Publication Year: 1969, Page(s):175 - 181
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1673 KB)

    Armstrong, Friedman, and Menon have shown how fundamental-mode normal flow tables can be realized without delay elements under the constraint that line delays do not exceed a given chain of gate delays. The state assignments for these tables are designed to yield noncritical races and minimum transition times. This note presents an independently discovered alternative to their design procedure and... View full abstract»

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  • Comments on "A High-Speed Algorithm for the Computer Generation of Fourier Transforms"

    Publication Year: 1969, Page(s): 182
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    The efficiency (in terms of both execution time and storage requirements) of a recently presented algorithm for computing the fast Fourier transform is compared to that of alternative algorithms. View full abstract»

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  • Comment on "Solution of Nonlinear Equations"

    Publication Year: 1969, Page(s):182 - 183
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB)

    The new method of solving nonlinear equations suggested by Kuo1is very interesting and the insight is truly commendable. However, the claim that the new method involves a smaller measure of work than the Newton-Raphson (N-R) method is somewhat m misleading. This statement is explained as follows. View full abstract»

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  • Comments on "Higher-Radix Division Using Estimates of the Divisor and Partial Remainder"

    Publication Year: 1969, Page(s): 183
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  • Contributors

    Publication Year: 1969, Page(s): 184
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  • Abstracts of Current Computer Literature

    Publication Year: 1969, Page(s):185 - 203
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  • R69-3 A Formula for Logical Network Cost

    Publication Year: 1969, Page(s): 204
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  • R69-4 Quasi-Analogue Discrete Simulating Mediums

    Publication Year: 1969, Page(s): 204
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  • Information for authors

    Publication Year: 1969, Page(s): 204
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  • Blank Page

    Publication Year: 1969, Page(s): 204
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org