IEEE Transactions on Computers

Issue 10 • Oct. 1969

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Displaying Results 1 - 23 of 23
  • IEEE Transactions on Computers - Table of contents

    Publication Year: 1969, Page(s):c1 - 984
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  • IEEE Computer Group

    Publication Year: 1969, Page(s): c2
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  • Optimal File Allocation in a Multiple Computer System

    Publication Year: 1969, Page(s):885 - 889
    Cited by:  Papers (164)  |  Patents (22)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (878 KB)

    A model is developed for allocating information files required in common by several computers. The model considers storage cost, transmission cost, file lengths, and request rates, as well as updating rates of files, the maximum allowable expected access times to files at each computer, and the storage capacity of each computer. The criterion of optimality is minimal overall operating costs (stora... View full abstract»

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  • Computer-Aided Test Generation for Four-Phase MOS LSI Circuits

    Publication Year: 1969, Page(s):890 - 894
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (876 KB)

    In this paper a practical approach to generate fault detection tests for four-phase MOS LSI circuits is discussed. Emphasis is given to a computer aid on the generation of both primary output and primary input test sequences. A technique to preset the circuit to predictable logic levels is presented. View full abstract»

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  • Magnetic-Field Design Considerations for a Plated-Wire Memory

    Publication Year: 1969, Page(s):894 - 899
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1120 KB)

    Permeable keepers are used in a plated-wire memory to reduce the adjacent bit interference and the current requirement. Computations of a magnetic field have been performed to determine the quantitative effect of the keeper size on the field enhancement in the region where the information is to be stored and on the field reduction outside this region. The field enhancement can be interpreted as th... View full abstract»

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  • Unified Interval Classification and Unified 3-Classification for Associative Memories

    Publication Year: 1969, Page(s):899 - 911
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2104 KB)

    Algorithms for a unified interval classification and a unified 3-classification for use in associative memories are presented. The former, which is more generally known as between-limits classification, achieves the classification of the words of an associative memory into those within and those without an interval marked by two given limits; the latter achieves the classification of the words int... View full abstract»

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  • Potential Functions in Mathematical Pattern Recognition

    Publication Year: 1969, Page(s):911 - 918
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1313 KB)

    This paper discusses a class of methods for pattern classification using a set of samples. They may also be used in reconstructing a probability density from samples. The methods discussed are potential function methods of a type directly derived from concepts related to superposition. The characteristics required of a potential function are examined, and it is shown that smooth potential function... View full abstract»

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  • Computer Optimization of Recognition Networks

    Publication Year: 1969, Page(s):918 - 923
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1096 KB)

    This paper discusses optimization and implementation of recognition networks using interconnections of a standard network element to form a classification network. The standard element has a nonlinear transfer function whose inputs may be weighted by selected resistors. It is assumed that a training set of samples to be accepted or rejected is available but neither the a priori probabilities or th... View full abstract»

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  • An Approach for the Realization of Threshold Functions of Order r

    Publication Year: 1969, Page(s):923 - 939
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2357 KB)

    In this paper we shall study the problem of nonlinear separation. As usual, a Boolean function F of n binary variables, xl,..., xn, xiΣ{1,0}, i=1,..., n, will be represented by a set of vertices C in the n-dimensional Euclidean space Enwhere each vertex has n binary-valued components, {1,0}. View full abstract»

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  • Worst-Case Analysis of a Resistor Memory Matrix

    Publication Year: 1969, Page(s):940 - 942
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB)

    The worst-case output voltage ratio Vs(1)min/Vs(0)maxis derived for a resistor memory matrix having a finite resistance ratio for the bit elements. It is found that the resistance ratio need not be large, and ratios greater than ten are usually sufficient. Input power and output voltage tradeoffs are also discussed. View full abstract»

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  • On the Tradeoff Between Response and Preemption Costs in a Foreground-Background Computer Service Discipline

    Publication Year: 1969, Page(s):942 - 947
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1024 KB)

    In computer operating systems where background jobs must occasionally be preempted in order to run high priority jobs, it is generally the case that efficient operation and rapid response to the high priority jobs are conflicting objectives. In this short paper a preemption scheme in which a delay is introduced is shown to provide the designer with the ability to trade off these two performance me... View full abstract»

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  • A Cellular Structure for Sequential Networks

    Publication Year: 1969, Page(s):947 - 953
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1138 KB)

    A cellular structure ("transfer logic"), suitable for implementing sequential networks, is described in this paper. A method is outlined for obtaining, for a given flow table, a transfer logic assignment employing the minimal number of state variables. The method is based on the properties of partitions of the set of internal states. View full abstract»

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  • Simplification of Incompletely Specified Flow Tables with the Help of Prime Closed Sets

    Publication Year: 1969, Page(s):953 - 956
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (696 KB)

    In this short note, an attempt has been made to arrive at a general algorithm for minimizing the number of internal states in an incompletely specified flow table. The closure property of the compatibility classes which cover a given flow table leads us to the derivation of a particular class of closed sets defined as irredundant prime closed sets. It has been shown that these prime closed sets in... View full abstract»

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  • On Mod-2 Sums of Products

    Publication Year: 1969, Page(s): 957
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (224 KB)

    An algorithm is provided for obtaining any Boolean function as a modulo-2 sum of products containing only uncomplemented variables. The proofs, which verify the algorithm and show the uniqueness of the results, are simple and free of special mathematical notation. View full abstract»

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  • Logical Design Using Shift Registers

    Publication Year: 1969, Page(s):958 - 960
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (464 KB)

    This correspondence presents a logical design procedure for feedback shift registers, which permits the gating of a common clock signal. View full abstract»

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  • Correction to "A Division Method Using a Parallel Multiplier"

    Publication Year: 1969, Page(s): 960
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (90 KB)

    Equation (14) on p. 226 of the above1 should have read: View full abstract»

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  • Contributors

    Publication Year: 1969, Page(s):961 - 962
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  • R69-30 Automatic Question-Answering of English-Like Questions About Simple Diagrams

    Publication Year: 1969, Page(s): 963
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  • R69-31 A Formal Deductive Problem-Solving System

    Publication Year: 1969, Page(s):963 - 964
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  • R69-32 A Universal Syntax-Directed Top-Down Analyzer

    Publication Year: 1969, Page(s):964 - 965
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  • R69-33 Applications of Functional Optimization Techniques for the Serial Hybrid Computer Solution of Partial Differential Equations

    Publication Year: 1969, Page(s): 965
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  • Abstracts of the Current Computer Literature

    Publication Year: 1969, Page(s):966 - 984
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  • Information for authors

    Publication Year: 1969, Page(s): 984
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org