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IEEE Transactions on Semiconductor Manufacturing

Issue 3 • Date Aug. 2006

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Displaying Results 1 - 18 of 18
  • Table of contents

    Publication Year: 2006, Page(s): c1
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  • IEEE Transactions on Semiconductor Manufacturing publication information

    Publication Year: 2006, Page(s): c2
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  • Optimization of photomask design for reducing aberration-induced placement error

    Publication Year: 2006, Page(s):277 - 285
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (639 KB) | HTML iconHTML

    In semiconductor manufacturing, the accurate placement of circuit components ensures the proper functioning of microelectronic circuits. This is often subject to photolithography, an optical technique that transfers circuit patterns from photomasks to silicon wafers. Sources of placement error include aberration and misalignment between different levels, and we focus on the former. Aberration is a... View full abstract»

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  • Simulations for the effect of chamber geometry on oxygen plasma characteristics for very large plasma sources

    Publication Year: 2006, Page(s):286 - 291
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1148 KB) | HTML iconHTML

    Using an oxygen discharge model based on diffusion equations, we numerically investigate the effect of chamber geometry on plasma density profiles, especially for very large rectangular high-density plasma chambers. The calculation results show that uniformity of the ion and O-atom density profiles seriously deteriorates when the chamber length increases up to 2 m. We discuss the dependence of the... View full abstract»

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  • Transient thermal analysis of sapphire wafers subjected to thermal shocks

    Publication Year: 2006, Page(s):292 - 297
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (310 KB) | HTML iconHTML

    Rapid heating and cooling are commonly encountered events in integrated circuit processing, which produce thermal shocks and consequent thermal stresses in wafers. The present paper studies the heat transfer in sapphire wafers during a thermal shock as well as the dependence of the wafer temperature on various process parameters. A three-dimensional finite-element model of a single sapphire wafer ... View full abstract»

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  • Just-in-time adaptive disturbance estimation for run-to-run control of semiconductor processes

    Publication Year: 2006, Page(s):298 - 315
    Cited by:  Papers (35)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (691 KB) | HTML iconHTML

    Run-to-run control is the term used for the application of discrete parts manufacturing control as practiced in the semiconductor industry. This paper presents a new algorithm for use in run-to-run control that has been designed to address some of the challenging issues unique to batch-type manufacturing. Just-in-time adaptive disturbance estimation (JADE) uses recursive weighted least squares par... View full abstract»

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  • Temperature and Substrate Effects in Monolithic RF Inductors on Silicon With 6- \mu\hbox {m} -Thick Top Metal for RFIC Applications

    Publication Year: 2006, Page(s):316 - 330
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1408 KB) | HTML iconHTML

    Comprehensive analyses of the effects of temperature (from -50degC to 200 degC), silicon substrate thickness, and proton implantation postprocess on the performances of a set of planar spiral inductors with 6-mum-thick top metal are demonstrated. Quality-factor (Q-factor) and power gain (GA) decrease with increasing temperatures but show a reverse behavior within a higher frequency rang... View full abstract»

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  • Low-K/Cu CMOS-based SoC technology with 115-GHz f/sub T/, 100-GHz f/sub max/, low noise 80-nm RF CMOS, high-Q MiM capacitor, and spiral Cu inductor

    Publication Year: 2006, Page(s):331 - 338
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (739 KB) | HTML iconHTML

    Logic CMOS-based RF technology is introduced for a 10-Gb transceiver in which active and passive RF devices have been realized in a single chip. RF nMOS of 115-GHz fT, 100-GHz fmax, and sub-1.0-dB NFmin at 10 GHz have been fabricated by aggressive device scaling and layout optimization. High-Q MiM capacitor and spiral Cu inductors have been successfully implemented... View full abstract»

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  • Multicluster tools scheduling: an integrated event graph and network model approach

    Publication Year: 2006, Page(s):339 - 351
    Cited by:  Papers (77)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (762 KB) | HTML iconHTML

    Steady-state throughput and scheduling of a multicluster tool become complex as the number of modules and clusters grows. We propose a new methodology integrating event graph and network models to study the scheduling and throughput of multicluster tools. A symbolic decision-move-done graph modeling is developed to simplify discrete-event dynamics for the multicluster tool. This event graph is fur... View full abstract»

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  • The development of the complete X-factor contribution measurement for improving cycle time and cycle time variability

    Publication Year: 2006, Page(s):352 - 362
    Cited by:  Papers (10)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (937 KB) | HTML iconHTML

    Reducing variability in a manufacturing process lowers system cycle times. Semiconductor manufacturing is a variable process due in part to product mix, reentry lot flows, batching, and machine breakdowns. This paper examines the issue of identifying machines that introduce variability into the system and constrain the system capacity. We develop a new X-factor contribution measurement, the comple... View full abstract»

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  • 2006 IEEE International Electron Devices Meeting

    Publication Year: 2006, Page(s): 363
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  • IEEE International Soild-State Circuits Conference (ISSCC 2007)

    Publication Year: 2006, Page(s): 364
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  • 22nd IEEE Non-Volatile Semiconductor Memory Workshop 2007

    Publication Year: 2006, Page(s): 365
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  • EDS archival collection on DVD

    Publication Year: 2006, Page(s): 366
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  • Join EDS and get online access [advertisement]

    Publication Year: 2006, Page(s): 367
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  • Explore IEL IEEE's most comprehensive resource [advertisement]

    Publication Year: 2006, Page(s): 368
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  • IEEE Transactions on Semiconductor Manufacturing Information for authors

    Publication Year: 2006, Page(s): c3
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  • Blank page [back cover]

    Publication Year: 2006, Page(s): c4
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Aims & Scope

The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief

Anthony Muscat
Department of Chemical and Environmental Engineering
Harshbarger Bldg., Room 134
1133 E. James Rogers Way
University of Arizona
Tucson, AZ  85721