Issue 6 • Date June 2006
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Table of contents
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PDF (47 KB)
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information
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PDF (38 KB)
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Synthesis of nonzero clock skew circuits
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PDF (505 KB)
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A theory of nondeterministic networks
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PDF (358 KB)
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Synthesis of quantum-logic circuits
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PDF (251 KB)
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Energy-aware task scheduling with task synchronization for embedded real-time systems
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PDF (325 KB)
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SILCA: SPICE-accurate iterative linear-centric analysis for efficient time-domain Simulation of VLSI circuits with strong parasitic couplings
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PDF (749 KB)
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Three-dimensional place and route for FPGAs
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PDF (386 KB)
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Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding
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PDF (575 KB)
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Concurrent error detection for involutional functions with applications in fault-tolerant cryptographic hardware design
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PDF (398 KB)
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Transparent DFT: a design for testability and test generation approach for synchronous sequential circuits
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PDF (210 KB)
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Statistical static timing analysis with conditional linear MAX/MIN approximation and extended canonical timing model
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PDF (360 KB)
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2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006)
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PDF (504 KB)
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IEEE Biomedical Circuits and Systems Conference healthcare technology (BiOCAS 2006)
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PDF (517 KB)
Aims & Scope
Contains articles on methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities.
Meet Our Editors
Editor-in-Chief
Sachin Sapatnekar
University of Minnesota
Dept. of Electrical and Computer Engineering
4-174 Keller Hall, 200 Union Street SE
Minneapolis, MN 55455 55455 USA
sachin@umn.edu


