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Micro, IEEE

Issue 3 • Date June 1988

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Displaying Results 1 - 6 of 6
  • The Intel 376 family for embedded processor applications

    Publication Year: 1988 , Page(s): 10 - 26
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1443 KB)  

    A detailed examination is made of the register set, addressing modes, instruction set, protection mechanisms, and debugging features of the Intel 80376 processor, especially as they relate to embedded applications. Hardware for the processor is described. Three other members of the family, namely, the 82370 integrated system peripheral, the 27C203A pipelined 256-byte EPROM, and the 80387SX numeric... View full abstract»

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  • Processor architecture considerations for embedded controller applications

    Publication Year: 1988 , Page(s): 28 - 38
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (902 KB)  

    The ways in which the environment of an embedded controller differs from that of a general-purpose CPU are described. A particular embedded controller application, the network interface is examined. The microprocessor used is the 32-bit VL86C010 Acorn RISC (reduced-instruction-set computer). The features of the network architecture, as they affect the choice of processor, are discussed. The impact... View full abstract»

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  • The TMS34010: an embedded microprocessor

    Publication Year: 1988 , Page(s): 39 - 52
    Cited by:  Patents (24)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1360 KB)  

    The authors discuss the TMS34010, a high-performance 32-bit microprocessor with special instructions and hardware for handling the bit-field data and address manipulations often associated with computer graphics. They give a history of embedded microprocessors and examine the wide range of processors and applications covered by that term. They provide an overview of the internal architecture of th... View full abstract»

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  • The MIPS R3010 floating-point coprocessor

    Publication Year: 1988 , Page(s): 53 - 62
    Cited by:  Papers (9)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (829 KB)  

    A description is given of the R3010 floating-point accelerator chip, a coprocessor that is based on advanced reduced-instruction-set-computer (RISC) architecture and VLSI design techniques and provides high-speed floating-point operation. The 75000-transistor hard-wired chip executes four instructions in parallel. Its performance is compared with that of available floating-point processors and its... View full abstract»

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  • Intel's 80960: an architecture optimized for embedded control

    Publication Year: 1988 , Page(s): 63 - 76
    Cited by:  Patents (25)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1147 KB)  

    Important features and capabilities of the 80960 are briefly examined, and an overview of its architecture is given. A detached discussion is presented of the register model, core instruction set, register operations, memory operations, control operations instruction cache, user-supervisor protection, interrupts, faults, and debug support.<> View full abstract»

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  • A pipelined interface for high floating-point performance with precise exceptions

    Publication Year: 1988 , Page(s): 77 - 87
    Cited by:  Papers (2)  |  Patents (16)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (772 KB)  

    Two options are presented that were considered for a pipelined interface between a central processing unit (CPU) and a floating-point coprocessor (FPU), along with the CPU recovery mechanisms that provide precise floating-point exceptions for each option. The first option supports parallel execution of both floating-point and integer instructions, while the second option pipelines only the executi... View full abstract»

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