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IEEE Transactions on Computers

Issue 5 • Date May 2006

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Displaying Results 1 - 18 of 18
  • [Front cover]

    Publication Year: 2006, Page(s): c1
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  • [Inside front cover]

    Publication Year: 2006, Page(s): c2
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  • Architecture support for 3D obfuscation

    Publication Year: 2006, Page(s):497 - 507
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1392 KB) | HTML iconHTML

    Software obfuscation is defined as a transformation of a program P into T(P) such that the whitebox and blackbox behaviors of T(P) are computationally indistinguishable. However, robust obfuscation is impossible to achieve with the existing software only solutions. This results from the power of the adversary model in digital rights management systems, which is significantly more than in the tradi... View full abstract»

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  • Affinity-driven system design exploration for heterogeneous multiprocessor SoC

    Publication Year: 2006, Page(s):508 - 519
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1544 KB) | HTML iconHTML

    Continuous advances in silicon technology enable the development of complex system-on-chip as cooperation among digital signal processors (DPSs), general purpose processors (GPPs), and specific hardware components. The impact of this choice is not only limited to the target architecture, but also encompasses the overall system specification. It is thus crucial to manage such a complexity using hig... View full abstract»

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  • Bit-parallel finite field multipliers for irreducible trinomials

    Publication Year: 2006, Page(s):520 - 533
    Cited by:  Papers (23)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1744 KB) | HTML iconHTML

    A new formulation for the canonical basis multiplication in the finite fields GF(2m) based on the use of a triangular basis and on the decomposition of a product matrix is presented. From this algorithm, a new method for multiplication (named transpositional) applicable to general irreducible polynomials is deduced. The transpositional method is based on the computation of 1-cycles and ... View full abstract»

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  • Fault localization, error correction, and graceful degradation in radix 2 signed digit-based adders

    Publication Year: 2006, Page(s):534 - 540
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1136 KB) | HTML iconHTML

    In this paper, a methodology for the development of fault-tolerant adders based on the radix 2 signed digit (SD) representation is presented. The use of a number representation characterized by a carry propagation confined to neighbor digits implies interesting advantages in terms of error detection, fault localization, and repair. Errors caused by faults belonging to a considered stuck-at fault s... View full abstract»

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  • Leading guard digits in finite precision redundant representations

    Publication Year: 2006, Page(s):541 - 548
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (560 KB) | HTML iconHTML

    Redundant number representations are generally used to allow constant time additions, based on the fact that only bounded carry-ripples take place. But, carries may ripple out into positions which may not be needed to represent the final value of the result and, thus, a certain amount of leading guard digits are needed to correctly determine the result. Also, when cancellation during subtractions ... View full abstract»

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  • Efficient symmetry breaking for Boolean satisfiability

    Publication Year: 2006, Page(s):549 - 558
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5016 KB) | HTML iconHTML

    Identifying and breaking the symmetries of conjunctive normal form (CNF) formulae has been shown to lead to significant reductions in search times. Symmetries in the search space are broken by adding appropriate symmetry-breaking predicates (SBPs) to an SAT instance in CNF. The SBPs prune the search space by acting as a filter that confines the search to nonsymmetric regions of the space without a... View full abstract»

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  • In-line interrupt handling and lock-up free translation lookaside buffers (TLBs)

    Publication Year: 2006, Page(s):559 - 574
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5072 KB) | HTML iconHTML

    The effects of the general-purpose precise interrupt mechanisms in use for the past few decades have received very little attention. When modern out-of-order processors handle interrupts precisely, they typically begin by flushing the pipeline to make the CPU available to execute handler instructions. In doing so, the CPU ends up flushing many instructions that have been brought in to the reorder ... View full abstract»

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  • Large-capacity high-throughput low-cost pipelined CAM using pipelined CTAM

    Publication Year: 2006, Page(s):575 - 587
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2536 KB) | HTML iconHTML

    A novel approach toward realizing a large capacity high-throughput pipelined content addressable memory (CAM) or associative memory (AM) at low cost has been described. It employs only commercial random access memory (RAM) along with a simple binary search pipeline (BSPL). In order to search a (2n-1)-word search key field (SKF) storage RAM, the BSPL employs n identical and simple binary... View full abstract»

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  • A DRAM/SRAM memory scheme for fast packet buffers

    Publication Year: 2006, Page(s):588 - 602
    Cited by:  Papers (13)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3176 KB) | HTML iconHTML

    We address the design of high-speed packet buffers for Internet routers. We use a general DRAM/SRAM architecture for which previous proposals can be seen as particular cases. For this architecture, large SRAMs are needed to sustain high line rates and a large number of interfaces. A novel algorithm for DRAM bank allocation is presented that reduces the SRAM size requirements of previously proposed... View full abstract»

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  • Approximation algorithms for multiconstrained quality-of-service routing

    Publication Year: 2006, Page(s):603 - 617
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5856 KB) | HTML iconHTML

    We propose six new heuristics to find a source-to-destination path that satisfies two or more additive constraints on edge weights. Five of these heuristics become ε-approximation algorithms when their parameters are appropriately set. The performance of our new heuristics is compared experimentally with that of two recently proposed heuristics for the same problem. View full abstract»

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  • Optimizing the length of checking sequences

    Publication Year: 2006, Page(s):618 - 629
    Cited by:  Papers (30)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1176 KB) | HTML iconHTML

    A checking sequence, generated from a finite state machine, is a test sequence that is guaranteed to lead to a failure if the system under test is faulty and has no more states than the specification. The problem of generating a checking sequence for a finite state machine M is simplified if M has a distinguishing sequence: an input sequence D~ with the property that the output sequence produced b... View full abstract»

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  • Carry-save representation is shift-unsafe: the problem and its solution

    Publication Year: 2006, Page(s):630 - 635
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1224 KB) | HTML iconHTML

    Several arithmetic circuits use carry-save (CS) representation of signed numbers in one's complement or two's complement. However, arithmetic right shifts of the CS form may generate incorrect results. This work presents the problem and proposes a simple solution to keep the correct CS representation of signed numbers when arithmetic right-shift operations or sign extensions are required. The auth... View full abstract»

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  • A fully pipelined systolic array for sinusoidal sequence generation

    Publication Year: 2006, Page(s):636 - 639
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (816 KB) | HTML iconHTML

    A sinusoidal sequence is to be generated for the purposes of offline technical computing for system simulation and design in which speed is a crucial issue. Sine and cosine series are derived from the Maclaurin series for exponential functions. A digital frequency is specified and a sine sequence is generated, sample by sample, by computing the truncated series using a completely pipelined systoli... View full abstract»

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  • [Advertisement]

    Publication Year: 2006, Page(s): 0640
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  • TC Information for authors

    Publication Year: 2006, Page(s): c3
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  • [Back cover]

    Publication Year: 2006, Page(s): c4
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org